公开(公告)号：DE3168838D1

公开(公告)日：1985-03-28

申请号：DE3168838

申请日：1981-01-30

Applicant: IBM DEUTSCHLAND ,  IBM

Inventor： MIERSCH EKKEHARD DR ,  POLLMANN KURT ,  SCHETTLER HELMUT ,  ZUHLKE RAINER DR

IPC: H03F3/217 ,  H03F3/20 ,  H03F3/30 ,  H03K5/02 ,  H03K17/16 ,  H03K19/0175 ,  H03K19/088 ,  H03K6/02 ,  H03K19/003

Abstract: Push-pull driver with reduced noise generation resulting from driver switching. A further transistor is arranged between the driver output transistor (which becomes conductive at the low output level) and the chip ground line. Its base is connected to a reference voltage source the other pole of which is connected to the ground plane of the circuit card to which the corresponding semiconductor chip is attached. If a noise voltage is generated on the chip ground line, the emitter potential of the further transistor is pulled up. As its base potential is maintained at a fixed value by the applied reference potential, this transistor becomes less conductive. As a result, the rate of current change in the output stage is reduced. The slowed down current rise, leads to a reduced noise voltage developing on the common chip ground line. According to another embodiment of the invention the output transistor and said further transistor are combined to form one transistor whose base is maintained at a fixed voltage by means of two series-connected Schottky diodes.

公开(公告)号：DE3063949D1

公开(公告)日：1983-08-04

申请号：DE3063949

申请日：1980-04-25

Applicant: IBM

Inventor： KRUMM HORST DR ,  SCHETTLER HELMUT ,  STAHL RAINER ,  ZUHLKE RAINER DR

IPC: H01L23/52 ,  H01L23/538 ,  H05K1/00 ,  H05K1/02 ,  H05K1/14

Abstract: Disclosed is a multi-layer module structure having a constant characteristic impedance. In each conductor line plane, two signal lines are arranged between a ground and a voltage supply line. This line sequence: ground/signal/signal/voltage supply line, is repeated several times in each conductor line plane. The spacing between the signal line and the adjacent ground and voltage supply line, respectively, is identical in each case. Adjacent conductor line planes, nth and (n+1)th have conductor lines arranged orthogonally. The lines of the nth and the (n+2)th plane are preferably staggered to each other such that when the nth plane is projected relative to the (n+2)th plane, the ground line of the (n+2)th plane is arranged in between the voltage supply lines (e.g. a voltage supply line and a ground line) of the nth plane.