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    Driver circuit using ring gate conductor
    1.
    发明专利
    Driver circuit using ring gate conductor 有权
    使用环形导体的驱动电路

    公开(公告)号：JP2000077630A

    公开(公告)日：2000-03-14

    申请号：JP21500599

    申请日：1999-07-29

    Applicant: Internatl Business Mach Corp ,  Siemens Ag ,  インターナショナル・ビジネス・マシーンズ・コーポレイション ,  シーメンス・アクチェンゲゼルシャフト

    Inventor： HOENIGSCHMID HEINZ ,  NETIS DMITRY

    IPC: H01L27/06 ,  G11C11/407 ,  H01L21/8234 ,  H01L21/8242 ,  H01L27/088 ,  H01L27/10 ,  H01L27/105 ,  H01L27/108

    CPC classification number: H01L27/108 ,  H01L27/105

    Abstract: PROBLEM TO BE SOLVED: To reduce the area occupied by a circuit on an IC by allowing each conductor pattern to comprise one or plural ring parts surrounding an element diffusion contact-point region, while a ring part forms the gate conductor of an insulated gate field effect transistor(IGFET).
    SOLUTION: A word line driver circuit 40, for example, comprises a plurality of ring field-effect transistor(IGFET) elements 42, with each of them provided with a ring conductor 44, while a drain region 46 is provided in the ring conductor 44, with a source region 48 provided outside the ring conductor 44. A single- line connection conductor 50 is provided between the ring IGFET elements 42, to allow conductive connection of the ring IGFET elements 42. With this configuration, the length of each transistor is increased, thus increasing the channel width of the transistor 42. The ring part is formed of a conductor pattern comprising the width of almost one minimum feature size F, with the interval between adjoining conductor patterns kept about 4F or less.
    COPYRIGHT: (C)2000,JPO

    Abstract translation: 要解决的问题：为了通过允许每个导体图案包括围绕元件扩散接触点区域的一个或多个环形部分来减小IC上的电路占据的面积，而环形成绝缘栅极场的栅极导体 效应晶体管（IGFET）。 解决方案：例如，字线驱动器电路40包括多个环形场效应晶体管（IGFET）元件42，其中每个元件设置有环形导体44，而漏极区域46设置在环形导体44中 ，源区域48设置在环形导体44的外部。在环形IGFET元件42之间提供单线连接导体50，以允许环形IGFET元件42的导电连接。利用该配置，每个晶体管的长度为 增加，从而增加了晶体管42的沟道宽度。环部分由包括几乎一个最小特征尺寸F的宽度的导体图案形成，相邻导体图案之间的间隔保持在约4°F或更小。

    SEMICONDUCTOR MEMORY WITH PROGRAMMABLE BITLINE MULTIPLEXERS
    5.
    发明申请
    SEMICONDUCTOR MEMORY WITH PROGRAMMABLE BITLINE MULTIPLEXERS 审中-公开
    具有可编程位线多路复用器的半导体存储器

    公开(公告)号：WO0193273A3

    公开(公告)日：2002-08-08

    申请号：PCT/US0117441

    申请日：2001-05-31

    Applicant: INFINEON TECHNOLOGIES CORP ,  IBM

    Inventor： MUELLER GERHARD ,  KIRIHATA TOSHIAKI ,  NETIS DMITRY

    IPC: G11C7/12 ,  G11C7/18 ,  G11C8/12 ,  G11C11/4094 ,  G11C11/4097 ,  G11C7/10

    CPC classification number: G11C11/4094 ,  G11C7/12 ,  G11C7/18 ,  G11C8/12 ,  G11C11/4097

    Abstract: There is provided a semiconductor memory device that includes: a plurality of memory cells arranged in at least two groups (102); at least one sense amplifier (SA); a first and a second multiplexer (MUXs); and at least one programmable control device (control circuit). Each multiplexer is adapted to couple at least one of the groups to the amplifier. The programmable control device is adapted to control the first and said second multiplexers. In one embodiment, the programmable control device is adapted to control the multiplexers independently.

    Abstract translation: 提供了一种半导体存储器件，其包括：布置在至少两组（102）中的多个存储单元; 至少一个读出放大器（SA）; 第一和第二多路复用器（MUX）; 和至少一个可编程控制装置（控制电路）。 每个多路复用器适于将至少一个组耦合到放大器。 可编程控制装置适于控制第一和第二多路复用器。 在一个实施例中，可编程控制装置适于独立地控制多路复用器。

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