公开(公告)号：CA2453685A1

公开(公告)日：2005-06-17

申请号：CA2453685

申请日：2003-12-17

Applicant: IBM CANADA

Inventor： VEZOLLE PASCAL ,  WHITE STEVEN W ,  ARCHAMBAULT ROCH G ,  O'CONNELL FRANCIS P ,  GAO YAOQING ,  MCCALPIN JOHN D ,  BLAINEY ROBERT J

IPC: G06F9/44 ,  G06F9/45 ,  G06F12/02

Abstract: A method and system of modifying instructions forming a loop is provided. A method of modifying instructions forming a loop includes modifying instructions formin g a loop including: determining static and dynamic characteristics for the instructions; selecti ng a modification factor for the instructions based on a number of separate equivalent sections formi ng a cache in a processor which is processing the instructions; and modifying the instructio ns to interleave the instructions in the loop according to the modification factor and the static and dynamic characteristics when the instructions satisfy a modification criteria based on the static and dynamic characteristics.

公开(公告)号：CA2363182C

公开(公告)日：2006-06-06

申请号：CA2363182

申请日：2001-11-19

Applicant: IBM CANADA

Inventor： BLAINEY ROBERT J ,  HALL BRIAN C ,  WHITE STEVEN W

IPC: G06F12/02 ,  G06F9/00 ,  G06F9/45 ,  G06F12/00

Abstract: A method, a computer or computer program product for automatically restructuring a program having arrays in inner loops to reduce an average penalty incurred for burst y cache miss patterns by spreading out the cache misses. The method may be used separately or in conjunction with methods for reducing the number of cache misses. The method determines a padding required for each array according to a proportion of the cache line size, to offset the starting points of the arrays relative to the start of a cache line memory access address for each array. Preferably, the starting points of the arrays that induce bursty cache misses are padded so that they are uniformly spaced from one another.

公开(公告)号：CA2363182A1

公开(公告)日：2003-05-19

申请号：CA2363182

申请日：2001-11-19

Applicant: IBM CANADA

Inventor： BLAINEY ROBERT J ,  HALL BRIAN C ,  WHITE STEVEN W

IPC: G06F9/00 ,  G06F9/45 ,  G06F12/00 ,  G06F12/02

Abstract: A method, a computer or computer program product for automatically restructuring a program having arrays in inner loops to reduce an average penalty incurred for burst y cache miss patterns by spreading out the cache misses. The method may be used separately or in conjunction with methods for reducing the number of cache misses. The method determines a padding required for each array according to a proportion of the cache line size, to offset the starting points of the arrays relative to the start of a cache line memory access address for each array. Preferably, the starting points of the arrays that induce bursty cache misses are padded so that they are uniformly spaced from one another.