公开(公告)号：DE2838817A1

公开(公告)日：1980-03-20

申请号：DE2838817

申请日：1978-09-06

Applicant: IBM DEUTSCHLAND

Inventor： GSCHWENDTNER JOERG DIPL ING ,  HAUG WERNER DIPL ING ,  CLEMEN RAINER DIPL ING

IPC: G11C11/41 ,  G11C11/24 ,  G11C11/408 ,  G11C11/413 ,  H03K3/353 ,  H03K3/356 ,  H03K5/02 ,  H03K5/15 ,  H03K19/0185 ,  H03K5/00 ,  G11C11/40

Abstract: Disclosed is a field effect transistor (FET) circuit for accepting a bipolar transistor logic level input signal and providing FET logic level output signals (both in-phase and out-of-phase components). The FET circuit includes a gated latch with means for pre-charging first and second nodes to an FET logic up level. One of the two nodes is brought to a slightly higher or lower level (depending on the binary value of the input), thereby producing a latent imbalance in the latch. A gating signal causes the latch to switch into the state pre-set by the latent imbalance.

公开(公告)号：DE2816980A1

公开(公告)日：1979-10-25

申请号：DE2816980

申请日：1978-04-19

Applicant: IBM DEUTSCHLAND

Inventor： ARZUBI LUIS ,  CLEMEN RAINER DIPL ING ,  GSCHWENDTNER JOERG DIPL ING

IPC: H03K19/096 ,  H03K17/06 ,  H03K19/0185 ,  H03K19/094 ,  H03K5/01 ,  H03K5/13

公开(公告)号：DE2431079A1

公开(公告)日：1976-02-12

申请号：DE2431079

申请日：1974-06-28

Applicant: IBM DEUTSCHLAND

Inventor： BARSUHN HORST DIPL ING ,  GSCHWENDTNER JOERG DIPL ING ,  HAUG WERNER OTTO DIPL ING

IPC: G11C11/405 ,  G11C7/02 ,  G11C11/404 ,  G11C11/4097 ,  H01L27/07 ,  H01L27/108 ,  G11C7/00 ,  G11C11/40

公开(公告)号：DE2929383A1

公开(公告)日：1981-02-12

申请号：DE2929383

申请日：1979-07-20

Applicant: IBM DEUTSCHLAND

Inventor： GSCHWENDTNER JOERG DIPL ING ,  LOEHLEIN WOLFDIETER ING GRAD

IPC: H03K5/00 ,  H03K5/02 ,  H03K19/017 ,  H03K19/0175 ,  H03K19/0185 ,  H03K19/094 ,  G11C11/40 ,  G11C7/00

Abstract: A known FET driver circuit which is to be controlled at the gate by means of relatively low TTL signals, is improved in such a manner that the source potential of the input transistors is shifted oppositely to the input signal. This leads to an increase in the effective potential difference in the signal level applied to the input transistors and thus to an improved switching speed.

公开(公告)号：DE2824727A1

公开(公告)日：1979-12-13

申请号：DE2824727

申请日：1978-06-06

Applicant: IBM DEUTSCHLAND

Inventor： HAUG WERNER DIPL ING ,  GSCHWENDTNER JOERG DIPL ING ,  SCHNADT ROBERT DIPL PHYS

IPC: G11C11/417 ,  G11C7/00 ,  G11C11/40 ,  G11C11/412 ,  H01L27/02 ,  H03K3/356