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    BIPOLAR TRANSISTOR
    2.
    发明申请
    BIPOLAR TRANSISTOR 审中-公开
    双极型晶体管

    公开(公告)号：WO0157916A3

    公开(公告)日：2002-03-21

    申请号：PCT/EP0100745

    申请日：2001-01-24

    Applicant: INFINEON TECHNOLOGIES AG ,  AUFINGER KLAUS ,  ZEILER MARKUS ,  BOECK JOSEF

    Inventor： AUFINGER KLAUS ,  ZEILER MARKUS ,  BOECK JOSEF

    IPC: H01L21/331 ,  H01L21/8222 ,  H01L27/082 ,  H01L29/06 ,  H01L29/08 ,  H01L29/732 ,  H01L29/73

    CPC classification number: H01L29/42304 ,  H01L29/0692 ,  H01L29/0813

    Abstract: Disclosed is a bipolar transistor (10) . By optimizing the layout, the product of the base collector capacity and the resistance of the collector can be reduced, thereby improving decisive transistor parameters. The bipolar transistor (10) comprises an emitter (E) (20) which is composed of several emitter elements (22,25, 26), several base contacts (B) (40,41) and several collector contacts (C) (50), said elements being used to form transistor layouts arranged according to a certain order. According to the invention, the emitter (20) has at least one closed configuration (21). The at least one emitter configuration (21) defines at least one inner emitter area (27) which can be subdivided into several partial areas (28). At least one of the base contacts (41) is arranged inside (27) the emitter. At least one other base contact (40) and the collector contacts (50) are arranged outside the emitter configuration (21).

    Abstract translation: 公开了一种双极型晶体管（10），其中由布局优化，基极 - 集电极电容和集电极电阻的乘积可以被减小，这导致键晶体管参数的改进。 所述双极型晶体管（10）包括多个发射器元件（22，25，26）形成的发射极（E）（20），多个基极接触的（B）（40，41）和多个收集器触点的（C）（50），所述的 提供了用于形成晶体管的布局元件在一个特定的安排到彼此。 根据本发明，它提供的是，发射器（20）包括至少一个封闭发射器配置（21），其中所述至少一个发射器配置（21），其限定至少一个发射器的内部空间（27），反过来，为（28），多个空间可被划分。 至少所述基极接触（41）中的一个布置在所述发射器的内部空间（27），同时至少一个其它的基极接触（40）和所述发射器配置（21）的外部收集器触点（50）被布置。

    Bauelement mit einer ringförmigen Metallstruktur und Verfahren
    4.
    发明专利
    Bauelement mit einer ringförmigen Metallstruktur und Verfahren 未知

    公开(公告)号：DE102010036978B4

    公开(公告)日：2014-09-11

    申请号：DE102010036978

    申请日：2010-08-13

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： LACHNER RUDOLF ,  BOECK JOSEF ,  AUFINGER KLAUS ,  KNAPP HERBERT

    IPC: H01L23/367 ,  H01L21/56 ,  H01L21/60 ,  H01L21/768 ,  H01L23/433 ,  H01L23/50

    Abstract: Bauelement (100), umfassend: einen Halbleiterchip (10), der ein Halbleitersubstrat (21) und eine ringförmige Metallstruktur (11) umfasst, die sich entlang einer Außenlinie (12) einer ersten Hauptoberfläche (13) des Halbleiterchips (10) erstreckt, wobei die ringförmige Metallstruktur (11) mehrere übereinander angeordnete und durch Vias miteinander gekoppelte Metallschichten umfasst, wobei die unterste Metallschicht über ein Via an das Halbleitersubstrat (21) gekoppelt ist, einen Kapselungskörper (14), der den Halbleiterchip (10) kapselt und eine zweite Hauptoberfläche (15) definiert, und ein Array von externen Kontaktpads (16), die an der zweiten Hauptoberfläche (15) des Kapselungskörpers (14) befestigt sind, wobei mindestens ein externes Kontaktpad (16) des Arrays von externen Kontaktpads (16) über eine oberhalb des Halbleiterchips (10) angeordnete Metallschicht (18) elektrisch an die oberste Metallschicht der ringförmigen Metallstruktur (11) gekoppelt ist.

    5.
    发明专利
    未知

    公开(公告)号：DE50115071D1

    公开(公告)日：2009-10-08

    申请号：DE50115071

    申请日：2001-01-24

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： AUFINGER KLAUS ,  ZEILER MARKUS ,  BOECK JOSEF

    IPC: H01L21/331 ,  H01L29/73 ,  H01L21/8222 ,  H01L27/082 ,  H01L29/06 ,  H01L29/08 ,  H01L29/732

    Abstract: A bipolar transistor is provided in which the product of base-collector capacitance and collector resistance can be reduced through a layout optimization, which leads to an improvement of the critical transistor parameters. The bipolar transistor has an emitter formed from a plurality of emitter elements, a plurality of base contacts and a plurality of collector contacts, these elements being provided in a specific arrangement with respect to one another for the formation of the transistor layout. The invention provides for the emitter to have at least one closed emitter configuration, the at least one emitter configuration bounding at least one emitter inner space, which can in turn be divided into a plurality of partial spaces. At least one of the base contacts is arranged in the emitter inner space, while at least one other base contact and the collector contacts are arranged outside the emitter configuration.

    6.
    发明专利
    未知

    公开(公告)号：DE10004111A1

    公开(公告)日：2001-08-09

    申请号：DE10004111

    申请日：2000-01-31

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： BOECK JOSEF ,  AUFINGER KLAUS ,  ZEILER MARKUS

    IPC: H01L21/331 ,  H01L21/8222 ,  H01L27/082 ,  H01L29/06 ,  H01L29/08 ,  H01L29/732 ,  H01L29/73

    Abstract: Disclosed is a bipolar transistor (10) . By optimizing the layout, the product of the base collector capacity and the resistance of the collector can be reduced, thereby improving decisive transistor parameters. The bipolar transistor (10) comprises an emitter (E) (20) which is composed of several emitter elements (22,25, 26), several base contacts (B) (40,41) and several collector contacts (C) (50), said elements being used to form transistor layouts arranged according to a certain order. According to the invention, the emitter (20) has at least one closed configuration (21). The at least one emitter configuration (21) defines at least one inner emitter area (27) which can be subdivided into several partial areas (28). At least one of the base contacts (41) is arranged inside (27) the emitter. At least one other base contact (40) and the collector contacts (50) are arranged outside the emitter configuration (21).

    7.
    发明专利
    未知

    公开(公告)号：AT441210T

    公开(公告)日：2009-09-15

    申请号：AT01949066

    申请日：2001-01-24

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： AUFINGER KLAUS ,  ZEILER MARKUS ,  BICK JOSEF

    IPC: H01L21/331 ,  H01L29/73 ,  H01L21/8222 ,  H01L27/082 ,  H01L29/06 ,  H01L29/08 ,  H01L29/732

    Abstract: A bipolar transistor is provided in which the product of base-collector capacitance and collector resistance can be reduced through a layout optimization, which leads to an improvement of the critical transistor parameters. The bipolar transistor has an emitter formed from a plurality of emitter elements, a plurality of base contacts and a plurality of collector contacts, these elements being provided in a specific arrangement with respect to one another for the formation of the transistor layout. The invention provides for the emitter to have at least one closed emitter configuration, the at least one emitter configuration bounding at least one emitter inner space, which can in turn be divided into a plurality of partial spaces. At least one of the base contacts is arranged in the emitter inner space, while at least one other base contact and the collector contacts are arranged outside the emitter configuration.

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