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公开(公告)号:DE102004041554B4
公开(公告)日:2006-11-30
申请号:DE102004041554
申请日:2004-08-27
Applicant: INFINEON TECHNOLOGIES AG
Inventor: EISELE IGNAZ , SCHULZE JOERG
IPC: H01L21/336
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公开(公告)号:DE102004041554A1
公开(公告)日:2006-03-02
申请号:DE102004041554
申请日:2004-08-27
Applicant: INFINEON TECHNOLOGIES AG
Inventor: EISELE IGNAZ , SCHULZE JOERG
IPC: H01L21/336
Abstract: Production of a vertical MOS transistor comprises epitaxially depositing an intrinsic sacrificial layer (4) made from Si1-xGex on a silicon substrate (1), depositing a high doped silicon layer (3) on the sacrificial layer, anisotropically etching a mesa structure including silicon regions (2, 3) and the sacrificial layer, growing an intrinsic silicon film (5) on the mesa structure, forming a MOS gate electrode (6, 7) by depositing over the intrinsic silicon film and etching to form an opening (9) in the mesa structure.
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公开(公告)号:DE102004015307A1
公开(公告)日:2005-10-20
申请号:DE102004015307
申请日:2004-03-29
Applicant: INFINEON TECHNOLOGIES AG
Inventor: EISELE IGNAZ , SCHULZE JOERG , LUDSTECK ALEXANDRA , STIMPEL TANJA
IPC: H01L21/02 , H01L21/28 , H01L21/302 , H01L21/324 , H01L29/51
Abstract: Preparing the surface (3) of a semiconductor body (1) for subsequent treatment comprises carrying out a temperature jump before treating in a specific atmosphere so that carbon can be burned away from the surface. Preferred Features: The specific atmosphere contains oxygen, preferably atomic oxygen, ozone or a gas which releases atomic oxygen or ozone. The temperature jump is carried out at 400-500 [deg] C. The surface is cleaned before the temperature jump.
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公开(公告)号:DE19621244C2
公开(公告)日:2003-08-28
申请号:DE19621244
申请日:1996-05-25
Applicant: INFINEON TECHNOLOGIES AG
Inventor: EISELE IGNAZ , KAESEN FLORIAN
IPC: H01L21/3105 , H01L21/336 , H01L29/78 , H01L29/423
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公开(公告)号:DE102004041554B8
公开(公告)日:2007-03-08
申请号:DE102004041554
申请日:2004-08-27
Applicant: INFINEON TECHNOLOGIES AG
Inventor: EISELE IGNAZ , SCHULZE JOERG
IPC: H01L21/336
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公开(公告)号:DE10061529A1
公开(公告)日:2002-06-27
申请号:DE10061529
申请日:2000-12-11
Applicant: INFINEON TECHNOLOGIES AG
Inventor: FINK CHRISTOPH , HANSCH WALTER , EISELE IGNAZ , WERNER WOLFGANG
IPC: H01L21/336 , H01L29/10 , H01L29/36 , H01L29/78
Abstract: Semiconductor component arranged in a semiconductor body comprises a source zone (4) and a drain zone (5) both having first conductivity; a body zone (8) of second conductivity arranged between the source and drain zones; and a gate electrode (11) insulated from the semiconductor body via a dielectric (10). Regions (12', 12'', 13) in a channel zone (12) of the body zone are provided with second conductivity, the first region (13) having a doping concentration which is lower than that of the second region (12', 12''). The combination of the regions produces a threshold voltage of the component which is larger than zero. An Independent claim is also included for a process for the production of a doping layer in a vertical semiconductor component comprising applying an epitaxial layer on a semiconductor body using thermal deposition; interrupting the thermal deposition; vaporizing a thin doping layer of second conductivity after cooling the semiconductor body; and applying a further epitaxial layer to the doping layer.
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