Low current, high gain, and single to differential buffer
    1.
    发明专利
    Low current, high gain, and single to differential buffer 审中-公开
    低电流,高增益和单向差分缓冲器

    公开(公告)号:JP2007300632A

    公开(公告)日:2007-11-15

    申请号:JP2007118984

    申请日:2007-04-27

    Abstract: PROBLEM TO BE SOLVED: To provide an enhanced input buffer amplifier which is suitable for electric circuits, such as system on chip (SoC) devices and which is not sensitive to DC level variations in the input signal.
    SOLUTION: The input buffer amplifier has a single ended input part and a differential output part. The input terminal is connected to a first differential stage 2 having two transistors T
    1 and T
    2 , and to a second differential stage 3 having two transistors T
    3 and T
    4 . The first and second differential stages 2 and 3 are further connected to first and second loads, for example, with current mirrors 10 and 20 connected so as to provide a differential output at output terminals OUT
    P and OUT
    N . The input signal is connected to a bias circuit 4 and its reference voltage Vref tracks the DC level of the input signal.
    COPYRIGHT: (C)2008,JPO&INPIT

    Abstract translation: 要解决的问题:提供一种适用于诸如片上系统(SoC)器件等电路并且对输入信号的直流电平变化不敏感的增强型输入缓冲放大器。

    解决方案:输入缓冲放大器具有单端输入部分和差分输出部分。 输入端子连接到具有两个晶体管T 1 和T 2 的第一差分级2,以及具有两个晶体管T SB 3的第二差分级3, / SB>和T 4 。 第一和第二差分级2和3进一步连接到第一和第二负载,例如,连接电流镜10和20,以便在输出端OUT P 和OUT < SB>名词。 输入信号连接到偏置电路4,其参考电压Vref跟踪输入信号的直流电平。 版权所有(C)2008,JPO&INPIT

    TWO-POINT MODULATOR COMPRISING A PLL CIRCUIT AND A SIMPLIFIED DIGITAL PRE-FILTERING SYSTEM
    2.
    发明申请
    TWO-POINT MODULATOR COMPRISING A PLL CIRCUIT AND A SIMPLIFIED DIGITAL PRE-FILTERING SYSTEM 审中-公开
    与PLL电路和简化的数字预滤两点调制器

    公开(公告)号:WO02099961A3

    公开(公告)日:2003-08-28

    申请号:PCT/DE0201914

    申请日:2002-05-24

    CPC classification number: H03C3/095 H03C3/0925 H03C3/0941

    Abstract: The invention relates to a two-point modulator (1) comprising a PLL circuit (2). Said two-point modulator (1) comprises a first circuit branch for injecting an analog modulation signal (17) into a first point of the PLL circuit (2), and a second circuit branch for injecting a digital modulation signal (16) into a second point of the PLL circuit (2). The second circuit branch controls a frequency distributor (9) in the feedback branch of the PLL circuit (2) and contains a digital filter (10) having a rectangular impulse response.

    Abstract translation: 本发明涉及一种双点调制器(1),具有PLL电路(2)。 两点调制器(1)包括:第一电路支路用于在PLL电路(2)和用于在第二点压印一个数字调制信号(16)的第二电路支路中的第一点施加一个模拟调制信号(17) PLL电路(2)。 所述第二电路支路控制所述PLL电路(2)的反馈支路的分频器(9)和包括具有矩形脉冲响应的数字滤波器(10)。

    CIRCUIT CONFIGURATION FOR PROVIDING A COMPLEX VALUE LOCAL OSCILLATOR SIGNAL AND RECEIVER
    3.
    发明申请
    CIRCUIT CONFIGURATION FOR PROVIDING A COMPLEX VALUE LOCAL OSCILLATOR SIGNAL AND RECEIVER 审中-公开
    提供复合光纤信号和接收器的电路安排

    公开(公告)号:WO03026126A3

    公开(公告)日:2003-10-09

    申请号:PCT/DE0203148

    申请日:2002-08-28

    CPC classification number: H03D3/007 H03B27/00

    Abstract: The invention relates to a circuit configuration for providing a complex value local oscillator signal. Said configuration comprises two dual mixers (M1, M1', M2, M2') that are controlled on their input pairs by a signal processing circuit (1) by means of a reference signal supplied to an input (E, E') in such a manner that on the dual mixers adapted for frequency conversion, on the output side (A, A') thereof, an inphase and a quadrature component are provided and have an exact phase shift of 90 DEG relative each other and jointly form a complex value local oscillator signal. The circuit configuration is preferably used in a receiver for controlling a downlink frequency converter (12). The aforementioned principle allows reduction of the dependence of the frequency shift of 90 DEG on work tolerances, a reduced frequency dependence of the phase shift and a substantially reduced current consumption of a mobile radio receiver.

    Abstract translation: 本发明提供一种电路装置,用于提供一个复杂的本地振荡器信号,其中两个双混合器(M1,M1“ M2,M2' )包括信号调节电路(1)可通过的手段被馈送以输入(E,E”)的参考信号,以便 在其输入端对被驱动,即,在设计用于频率转换的双混频器输出端(A,A“)a相和正交分量,其每个都具有90度的精确相移并一起形成一个复杂的本地振荡器信号提供。 该电路装置优选可应用于用于驱动下变频器(12)的接收器中。 这个原理允许在90度的频移的依赖于制造公差的减小,相移的减小的频率依赖性,以及移动无线电接收机的显著更低的功耗。

    DEMODULATOR AND DEMODULATION METHOD FOR DEMODULATING RECEIVED SIGNALS
    4.
    发明申请
    DEMODULATOR AND DEMODULATION METHOD FOR DEMODULATING RECEIVED SIGNALS 审中-公开
    解调器的调制和解调用于解调接收信号

    公开(公告)号:WO03017464A3

    公开(公告)日:2003-10-02

    申请号:PCT/DE0202091

    申请日:2002-06-07

    CPC classification number: H03D3/007

    Abstract: The invention relates to a demodulator and a demodulation method. The aim of the invention is to enable a reliable demodulation in the event of an overlap of the intermediate frequency range and the signal data frequency range. To this end, a rapidly oscillating output signal (14) is generated from the in-phase signal (11) and the quadrature signal (12), the sign of said output signal varying according to the product of the sign of the in-phase signal and of the quadrature signal. Either an XOR gate (13) or a multiplier stage can be used in order to produce one such output signal.

    Abstract translation: 本发明涉及一种解调器和解调方法,使即使中间频率范围与信号的数据频率的范围重叠可靠解调。 为了这个目的,产生从同相信号(11)和正交信号(12)迅速振荡输出信号(14),改变了符号中根据所述同相和正交信号的符号的乘积。 为了产生这样的输出信号可以是一个异或门(13),或者可以使用一个乘法器级。

    TRANSMITTER SYSTEM, ESPECIALLY FOR CELLULAR TELEPHONY
    5.
    发明申请
    TRANSMITTER SYSTEM, ESPECIALLY FOR CELLULAR TELEPHONY 审中-公开
    发送安排,特别是移动电话

    公开(公告)号:WO03019769A2

    公开(公告)日:2003-03-06

    申请号:PCT/DE0203168

    申请日:2002-08-29

    CPC classification number: H03C3/40 H04B1/04 H04B1/0475

    Abstract: The invention relates to a transmitter system, especially for cellular telephony, which modulates a modulation signal (cos omega mt, sin omega mt) onto a low-frequency carrier signal (cos 1/3 omega t, sin 1/3 omega t) using two intermediate-frequency rejecting mixers (5, 6), and which translates the signal (cos 1/3 omega t+ omega mt, sin 1/3 omega t+ omega mt) thereby obtained and present on the outputs of the modulators (5, 6) as a complex signal due to the circuitry of the inventive transmitter system into a desired transmission frequency by means of a frequency translator (4). The invention combines the advantages of vector modulation at a relatively low frequency with the advantages of an intermediate-frequency rejection mixing during modulation.

    Abstract translation: 它是一种传输装置,特别是用于移动无线通信,表明由两个图像频率抑制混频器的装置的调制信号(COS欧米加公吨,罪欧米加公吨)(5,6)(在低频载波信号cos 1/3欧米加吨,罪1/3欧米加 t)的调制,并由此获得(COS信号1/3的ωT +ω-MT,罪1/3欧米加吨+ω-MT),其由于根据设置用于布线(在调制器5的输出在本发送装置,6),其为复杂的信号存在 与变频器(4)连接到所需的传输频率。 因此,相对较低频率的矢量调制的优点与调制中镜频抑制混合的优点相结合。

    FREQUENCY CONVERTING CIRCUIT ARRANGEMENT AND MOBILE RADIO SET COMPRISING SAID CIRCUIT ARRANGEMENT
    6.
    发明申请
    FREQUENCY CONVERTING CIRCUIT ARRANGEMENT AND MOBILE RADIO SET COMPRISING SAID CIRCUIT ARRANGEMENT 审中-公开
    电路安排和电路安排频率传输和移动无线电设备

    公开(公告)号:WO03079537A2

    公开(公告)日:2003-09-25

    申请号:PCT/DE0300478

    申请日:2003-02-17

    CPC classification number: H03B27/00 H03D7/165

    Abstract: Disclosed is a frequency converting circuit arrangement (14) supplying a complex-valued output signal at the output (2) thereof. Said circuit comprises two frequency mixers (3, 4) which are respectively triggered by an input signal and a feedback signal which represents the frequency-divided output signal and is divided into an in-phase component and a quadrature component. The inventive frequency converting circuit (14) makes it possible to supply in a frequency-precise manner that is independent of production tolerance a signal with one output frequency, said signal being supplied as an IQ signal and being decoupled frequency-wise from the input signal, wherefore said frequency converting circuit (14) is particularly suitable for mobile radio transceivers.

    Abstract translation: 规定了用于频率转换(14)的电路装置,其在其输出端(2)提供复数值的输出信号。 该电路包括两个混频器(3,4),一方面由输入信号控制,另一方面由反馈信号控制。 反馈信号是分频输出信号,并以同相和正交分量进行分解。 所描述的频率转换电路(14)能够实现具有输出频率的信号的生产公差无关和频率精确的提供,该输出频率作为IQ信号存在,并且在频率方面也从输入信号解耦。 因此,频率转换电路(14)特别适合用于移动无线电收发机。

    10.
    发明专利
    未知

    公开(公告)号:DE102004021155B3

    公开(公告)日:2005-12-29

    申请号:DE102004021155

    申请日:2004-04-29

    Abstract: A traveling wave amplifier comprises a first normally off MOS transistor having a drain, source and gate terminal. The drain terminal is connected to a node of a drain line, which is connected to a first supply voltage potential via a connecting resistor. The gate terminal is connected to a node of a gate line, onto which an input signal is coupled. The source terminal is coupled to a second supply voltage potential via a first resistor. The traveling wave amplifier also comprises at least one second normally off MOS transistor. In addition, the traveling wave amplifier further comprises a normally off bias MOS transistor. The normally off bias MOS transistor forms a current mirror with at least one of the second normally off MOS transistors. An output signal of the traveling wave amplifier is tapped off on the drain line.

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