公开(公告)号：ES2214875T3

公开(公告)日：2004-09-16

申请号：ES99936340

申请日：1999-05-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ALLINGER ROBERT ,  HOLLFELDER ROBERT ,  POCKRANDT WOLFGANG ,  WEDEL ARMIN

IPC: G07F7/10 ,  H03K21/40

Abstract: A method of operating a multistage counter in only one counting direction includes the step of changing a counter reading of a single-stage auxiliary counter at given counter readings of the multistage counter. The single-stage auxiliary counter and the multistage counter can only be changed in one counting direction. Respective counter readings of the multistage counter and of the single-stage auxiliary counter are registered. Values of the respective counter readings of the single-stage auxiliary counter and of the multistage counter are compared with one another, and an indicator signal is generated based on a comparison result determined in the comparing step.

公开(公告)号：DE59908203D1

公开(公告)日：2004-02-05

申请号：DE59908203

申请日：1999-05-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ALLINGER ROBERT ,  HOLLFELDER ROBERT ,  POCKRANDT WOLFGANG ,  WEDEL ARMIN

IPC: G07F7/10 ,  H03K21/40

Abstract: A method of operating a multistage counter in only one counting direction includes the step of changing a counter reading of a single-stage auxiliary counter at given counter readings of the multistage counter. The single-stage auxiliary counter and the multistage counter can only be changed in one counting direction. Respective counter readings of the multistage counter and of the single-stage auxiliary counter are registered. Values of the respective counter readings of the single-stage auxiliary counter and of the multistage counter are compared with one another, and an indicator signal is generated based on a comparison result determined in the comparing step.

公开(公告)号：BR9911603A

公开(公告)日：2001-02-06

申请号：BR9911603

申请日：1999-05-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ALLINGER ROBERT ,  HOLLFELDER ROBERT ,  POCKRANDT WOLFGANG ,  WEDEL ARMIN

IPC: G07F7/10 ,  H03K21/40

Abstract: A method of operating a multistage counter in only one counting direction includes the step of changing a counter reading of a single-stage auxiliary counter at given counter readings of the multistage counter. The single-stage auxiliary counter and the multistage counter can only be changed in one counting direction. Respective counter readings of the multistage counter and of the single-stage auxiliary counter are registered. Values of the respective counter readings of the single-stage auxiliary counter and of the multistage counter are compared with one another, and an indicator signal is generated based on a comparison result determined in the comparing step.

公开(公告)号：AT257294T

公开(公告)日：2004-01-15

申请号：AT99936340

申请日：1999-05-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ALLINGER ROBERT ,  HOLLFELDER ROBERT ,  POCKRANDT WOLFGANG ,  WEDEL ARMIN

IPC: G07F7/10 ,  H03K21/40

Abstract: A method of operating a multistage counter in only one counting direction includes the step of changing a counter reading of a single-stage auxiliary counter at given counter readings of the multistage counter. The single-stage auxiliary counter and the multistage counter can only be changed in one counting direction. Respective counter readings of the multistage counter and of the single-stage auxiliary counter are registered. Values of the respective counter readings of the single-stage auxiliary counter and of the multistage counter are compared with one another, and an indicator signal is generated based on a comparison result determined in the comparing step.

公开(公告)号：BR0011915A

公开(公告)日：2002-03-19

申请号：BR0011915

申请日：2000-05-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： FIBRANZ HEIKO ,  BRUECKLMAYR FRANZ-JOSEF ,  REINER ROBERT ,  ALLINGER ROBERT ,  KLOSA KLAUS ,  HOLLFELDER ROBERT ,  KARGL WALTER

IPC: G06F12/14 ,  G07F7/10

Abstract: A memory (SP) is provided with sectors (S1,...,Sm) where at least one row (Z1,...,Zn) forms each sector and a number of keys (K1,...,Kk) are provided. For each application a number of sectors are provided of variable seize. At least one access right (AC) and at least one connection (SI) is assigned to each row (Z1,...,Zn). At least one key is allocated to each row and the rows can be provided either with or without the keys. All rows with the same connections form a virtual sector.