公开(公告)号：WO2004088726A3

公开(公告)日：2004-11-25

申请号：PCT/EP2004003540

申请日：2004-04-02

Applicant: INFINEON TECHNOLOGIES AG ,  IBM ,  FAYAZ FAZIL MOHAMMED ,  KERST UWE ,  MEZZAPELLE JOSEPH ,  YANG HAINING

Inventor： FAYAZ FAZIL MOHAMMED ,  KERST UWE ,  MEZZAPELLE JOSEPH ,  YANG HAINING

IPC: H01L21/02 ,  H01L27/08 ,  H01L29/92

CPC classification number: H01L28/40 ,  H01L27/0805

Abstract: A MIM capacitor includes a bottom plate (212), a capacitor dielectric (214) disposed over the bottom plate, and a top plate (216) disposed over the capacitor dielectric. An etch stop material (218) is disposed over the top plate, and the top plate has a width that is less than the width of the etch stop material width. The top plate edges may be pulled back during the removal of the resist (220) used to pattern the top plate, by the addition of chemistries in the resist etch that are adapted to pull-back or undercut the top plate edges (224) beneath the etch stop material.

Abstract translation: MIM电容器包括底板（212），设置在底板上的电容器电介质（214）和设置在电容器电介质上的顶板（216）。 蚀刻停止材料（218）设置在顶板上方，并且顶板的宽度小于蚀刻停止材料宽度的宽度。 在去除用于图案化顶板的抗蚀剂（220）期间，顶板边缘可以被拉回，通过在抗蚀剂蚀刻中添加适于将下面的顶板边缘（224）拉回或倒下的化学物质 蚀刻停止材料。

公开(公告)号：DE602004003476D1

公开(公告)日：2007-01-11

申请号：DE602004003476

申请日：2004-02-17

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BARTH HANS-JOACHIM ,  FELSNER PETRA ,  KALTALIOGLU ERDEM ,  KERST UWE ,  SCHAFBAUER THOMAS

IPC: H01G4/06 ,  H01G4/228 ,  H01G4/33 ,  H01G4/40 ,  H01L21/768 ,  H01L21/77 ,  H01L21/8242 ,  H01L27/02 ,  H01L27/108

Abstract: In a method of fabricating a semiconductor device, a level of metal is formed within an interval dielectric. The level of metal includes a first metal line separated from a second metal line by a region of the interlevel dielectric. The region of interlevel dielectric is removed between the first metal line and the second metal line. A high-k dielectric is formed between the first metal line and the second metal line in the region where the interlevel dielectric was removed such that a capacitor is formed by the first metal line, the second metal line and the high-k dielectric.

公开(公告)号：DE602004003476T2

公开(公告)日：2007-09-20

申请号：DE602004003476

申请日：2004-02-17

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BARTH HANS-JOACHIM ,  FELSNER PETRA ,  KALTALIOGLU ERDEM ,  KERST UWE ,  SCHAFBAUER THOMAS

IPC: H01G4/06 ,  H01G4/228 ,  H01G4/33 ,  H01G4/40 ,  H01L21/768 ,  H01L21/77 ,  H01L21/8242 ,  H01L27/02 ,  H01L27/108

Abstract: In a method of fabricating a semiconductor device, a level of metal is formed within an interval dielectric. The level of metal includes a first metal line separated from a second metal line by a region of the interlevel dielectric. The region of interlevel dielectric is removed between the first metal line and the second metal line. A high-k dielectric is formed between the first metal line and the second metal line in the region where the interlevel dielectric was removed such that a capacitor is formed by the first metal line, the second metal line and the high-k dielectric.