公开(公告)号：AU2002358618A1

公开(公告)日：2003-07-09

申请号：AU2002358618

申请日：2002-12-05

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHRENK MICHAEL ,  KOLLER KLAUS ,  KORNER HEINRICH

IPC: H01L21/02 ,  H01L21/768 ,  H01G4/12 ,  H01G4/08 ,  H01L29/92

Abstract: To fabricate an integrated semiconductor product with integrated metal-insulator-metal capacitor, first of all a dielectric auxiliary layer ( 6 ) is deposited on a first electrode ( 2, 3, 5 ). This auxiliary layer ( 6 ) is then opened up ( 15 ) via the first electrode. Then, a dielectric layer ( 7 ) is produced, and the metal track stack ( 8, 9, 10 ) for the second electrode is then applied to the dielectric layer ( 6 ). This is followed by the patterning of the metal-insulator-metal capacitor using known etching processes. This makes it possible to produce dielectric capacitor layers of any desired thickness using materials which can be selected as desired. In particular, this has the advantage that via etches can be carried out significantly more easily than in the prior art, since it is not necessary to etch through the residual dielectric capacitor layer above the metal tracks.