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公开(公告)号:AU2002358618A1
公开(公告)日:2003-07-09
申请号:AU2002358618
申请日:2002-12-05
Applicant: INFINEON TECHNOLOGIES AG
Inventor: SCHRENK MICHAEL , KOLLER KLAUS , KORNER HEINRICH
IPC: H01L21/02 , H01L21/768 , H01G4/12 , H01G4/08 , H01L29/92
Abstract: To fabricate an integrated semiconductor product with integrated metal-insulator-metal capacitor, first of all a dielectric auxiliary layer ( 6 ) is deposited on a first electrode ( 2, 3, 5 ). This auxiliary layer ( 6 ) is then opened up ( 15 ) via the first electrode. Then, a dielectric layer ( 7 ) is produced, and the metal track stack ( 8, 9, 10 ) for the second electrode is then applied to the dielectric layer ( 6 ). This is followed by the patterning of the metal-insulator-metal capacitor using known etching processes. This makes it possible to produce dielectric capacitor layers of any desired thickness using materials which can be selected as desired. In particular, this has the advantage that via etches can be carried out significantly more easily than in the prior art, since it is not necessary to etch through the residual dielectric capacitor layer above the metal tracks.
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公开(公告)号:DE10358299A1
公开(公告)日:2005-07-14
申请号:DE10358299
申请日:2003-12-12
Applicant: INFINEON TECHNOLOGIES AG
Inventor: MUELLER KARL-HEINZ , KOLLER KLAUS , DECKER STEFAN
IPC: H01L21/02 , H01L21/334 , H01L27/08 , H01L29/94 , H01L21/822
Abstract: A capacitor component for integrated circuits comprises a trench (12) in a substrate (10) having at least three conductive layers (14,18,20) alternating with at least two dielectric layers in the trench. Preferably there is a highly doped region at a trench wall with one of the conductive layers being built through this region. An independent claim is also included for a production process for the above.
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公开(公告)号:DE10212630A1
公开(公告)日:2003-10-16
申请号:DE10212630
申请日:2002-03-21
Applicant: INFINEON TECHNOLOGIES AG
Inventor: KOLLER KLAUS , MUELLER KARL-HEINZ , BUEYUEKTAS KEVNI
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公开(公告)号:AU2003218795A1
公开(公告)日:2003-10-08
申请号:AU2003218795
申请日:2003-03-19
Applicant: INFINEON TECHNOLOGIES AG
Inventor: MUELLER KARLHEINZ , BUEYUEKTAS KEVNI , KOLLER KLAUS
IPC: H01F17/00 , H01F41/04 , H01L21/02 , H01L23/522 , H01L27/08
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公开(公告)号:DE102008000217A1
公开(公告)日:2008-08-28
申请号:DE102008000217
申请日:2008-02-01
Applicant: INFINEON TECHNOLOGIES AG
Inventor: WALTER WOLFGANG , KOLLER KLAUS
IPC: H01L23/544 , H01L21/768
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公开(公告)号:DE10161286A1
公开(公告)日:2003-07-03
申请号:DE10161286
申请日:2001-12-13
Applicant: INFINEON TECHNOLOGIES AG
Inventor: SCHRENK MICHAEL ANTON , KOLLER KLAUS , KOERNER HEINRICH
IPC: H01L21/02 , H01L21/768 , H01L27/08 , H01L29/92
Abstract: To produce an integrated semiconductor product comprising an integrated metal-insulator-metal capacitor, a dielectric auxiliary layer (6) is first deposited on a first electrode (2, 3, 5). Said auxiliary layer (6) is then opened over the first electrode (15). A dielectric layer (7) is then created, onto which the stack (8, 9, 10) of metal strips for the second electrode is applied. The metal-insulator-metal capacitor is subsequently patterned using conventional etching technology. This allows the production of dielectric capacitor layers comprising freely selectable materials of any thickness. The particular advantage of the invention is that the etching of vias can be carried out in a significantly simpler manner than in prior art, as it is not necessary to etch through the remaining dielectric capacitor layer over the metal strips.
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公开(公告)号:DE102006036076A1
公开(公告)日:2008-02-07
申请号:DE102006036076
申请日:2006-08-02
Applicant: INFINEON TECHNOLOGIES AG
Inventor: AHRENS CARSTEN , FOERG RAIMUND , KOLLER KLAUS , SUBKE KAI-OLAF
IPC: H01L21/822 , H01L27/08
Abstract: A capacitor device includes a substrate, a first conductive structure, a second conductive structure, a dielectric layer structure, and a recess in the substrate. The first and second conductive structures are disposed on opposite sides of the dielectric layer structure, and the dielectric layer structure extends in a meander-shaped manner in a cross-section through the recess.
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公开(公告)号:DE102008000217B4
公开(公告)日:2013-04-11
申请号:DE102008000217
申请日:2008-02-01
Applicant: INFINEON TECHNOLOGIES AG
Inventor: WALTER WOLFGANG , KOLLER KLAUS
IPC: H01L23/544 , G01R31/26 , H01L21/66 , H01L21/768
Abstract: Teststruktur (100), umfassend: eine Speiseleitung (104a), die in einer ersten leitenden Materialschicht (M1) angeordnet ist, und eine Stressleitung (104b), die in der ersten leitenden Materialschicht (M1) benachbart der Speiseleitung (104a), aber von der Speiseleitung (104a) beabstandet, angeordnet ist, wobei die Stressleitung (104b) an die Speiseleitung (104a) durch ein leitendes Strukturmerkmal (108a, 108b, 112, 108c) gekoppelt ist, das in mindestens einer zweiten leitenden Materialschicht (V1) benachbart der ersten leitenden Materialschicht (M1) angeordnet ist, wobei die Speiseleitung (104a) eine Länge im Bereich von etwa 20 Mikrometer bis 80 Mikrometer hat.
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公开(公告)号:DE102006036076B4
公开(公告)日:2011-05-19
申请号:DE102006036076
申请日:2006-08-02
Applicant: INFINEON TECHNOLOGIES AG
Inventor: AHRENS CARSTEN , FOERG RAIMUND , KOLLER KLAUS , SUBKE KAI-OLAF
IPC: H01L21/822 , H01L27/08
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公开(公告)号:DE50300810D1
公开(公告)日:2005-08-25
申请号:DE50300810
申请日:2003-03-19
Applicant: INFINEON TECHNOLOGIES AG
Inventor: BUEYUEKTAS KEVNI , KOLLER KLAUS , MUELLER KARLHEINZ
IPC: H01F17/00 , H01F41/04 , H01L21/02 , H01L23/522 , H01L27/08
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