公开(公告)号：DE10355508B4

公开(公告)日：2006-07-06

申请号：DE10355508

申请日：2003-11-27

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHNEEGANS MANFRED ,  SGOURIDIS SOKRATIS ,  MUELLER DIRK

IPC: H01L23/48 ,  H01L21/60 ,  H01L23/00 ,  H01L23/485 ,  H01L23/525

Abstract: The invention relates to an ultrathin semiconductor circuit having contact bumps and to a corresponding production method. The semiconductor circuit includes a bump supporting layer having a supporting layer thickness and having a supporting layer opening for uncovering a contact layer element being formed on the surface of a semiconductor circuit. An electrode layer is situated on the surface of the contact layer element within the opening of the bump supporting layer, on which electrode layer is formed a bump metallization for realizing the contact bump. On account of the bump supporting layer, a thickness of the semiconductor circuit can be thinned to well below 300 micrometers, with the wafer reliably being prevented from breaking. Furthermore, the moisture barrier properties of the semiconductor circuit are thereby improved.

公开(公告)号：DE10355508A1

公开(公告)日：2005-07-07

申请号：DE10355508

申请日：2003-11-27

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHNEEGANS MANFRED ,  SGOURIDIS SOKRATIS ,  MUELLER DIRK

IPC: H01L21/60 ,  H01L23/00 ,  H01L23/485 ,  H01L23/525 ,  H01L23/48

Abstract: The invention relates to an ultrathin semiconductor circuit having contact bumps and to a corresponding production method. The semiconductor circuit includes a bump supporting layer having a supporting layer thickness and having a supporting layer opening for uncovering a contact layer element being formed on the surface of a semiconductor circuit. An electrode layer is situated on the surface of the contact layer element within the opening of the bump supporting layer, on which electrode layer is formed a bump metallization for realizing the contact bump. On account of the bump supporting layer, a thickness of the semiconductor circuit can be thinned to well below 300 micrometers, with the wafer reliably being prevented from breaking. Furthermore, the moisture barrier properties of the semiconductor circuit are thereby improved.