Patent search ap:("INFINEON TECHNOLOGIES AG") AND inv:"MUELLER SEBASTIAN" Page 1

1.

发明专利
Flip chip bonding fabricating method for semiconductor component, involves hardening of bumps after applying two-stage adhesive, and applying die with bumps made of hardened adhesive on substrate by contact of bumps with substrate contact 未知

公开(公告)号：DE102006009478A1

公开(公告)日：2007-08-30

申请号：DE102006009478

申请日：2006-02-27

Applicant: INFINEON TECHNOLOGIES AG

Inventor： REISS MARTIN , MUELLER SEBASTIAN , NOCKE KERSTIN

IPC: H01L21/60 , H01L21/58 , H01L23/13 , H01L23/488

Abstract: The method involves connecting a contact (4) of a die with a contact of a substrate by electrically conducting bumps that are made of conducting adhesives (7). The bumps are applied on the contact of the die by an electrically conducting two-stage hardened adhesive. The bumps are hardened after applying the adhesive in a stage, and the die with the bumps made of the hardened adhesive is applied on the substrate by contact of the bumps with the contact of the substrate. The adhesive is hardened during manufacturing of an adhesive connection between the die and the substrate in another stage. Independent claims are also included for the following: (1) a substrate for implementing a flip chip bonding method (2) a semiconductor component with a die.

2.

发明专利
Method for fabricating an integrated module, requires housing material for functioning together holding structure in substrate 未知

公开(公告)号：DE102005051036A1

公开(公告)日：2007-04-26

申请号：DE102005051036

申请日：2005-10-25

Applicant: INFINEON TECHNOLOGIES AG

Inventor： REISS MARTIN , BLASZCZAK STEPHAN , SCHEIBE BERND , MUELLER SEBASTIAN , NOCKE KERSTIN

IPC: H01L21/50 , H01L23/12 , H01L23/28

Abstract: A method for fabricating an integrated module involves preparing a supporting substrate (2), especially with a chip mounted thereon, making available a holding structure in or on the substrate (2) and providing a housing material to form a housing (5) so that the housing material functions together with the holding structure in the substrate, to take up a lateral tensioning between the housing (5) and the substrate (2). An independent claim is included for (1) (A) A module or building block with support substrate and (2) (B) A module- substrate with several inter-joined substrates.

3.

发明专利
Electronic component, especially multi chip as in ball grid array, has one chip above another with spacers between them and bond wire to inner conductive surface of lower chip 未知

公开(公告)号：DE102005054353A1

公开(公告)日：2006-08-17

申请号：DE102005054353

申请日：2005-11-15

Applicant: INFINEON TECHNOLOGIES AG

Inventor： REISS MARTIN , MUELLER SEBASTIAN

IPC: H01L25/065 , H01L21/50 , H01L23/48

Abstract: An electronic component (10) comprises two separated chips (11,12) one above the contact upper surface of the other with many spacers (19) between them and a bond wire (17) joining the contact surface, which is in an inner region of the chip upper face. At least one spacer is in an outer region of this surface : An independent claim is also included for a production process for the above component.

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