公开(公告)号：DE102004029585A1

公开(公告)日：2006-01-19

申请号：DE102004029585

申请日：2004-06-18

Applicant: INFINEON TECHNOLOGIES AG

Inventor： REIS MARTIN ,  NOCKE KERSTIN ,  BENDER CARSTEN ,  KROEHNERT STEFFEN

IPC: H01L21/48 ,  H01L23/053 ,  H01L23/12

Abstract: Chip package comprises a reinforcing layer (2) fixed to a system carrier (1). The reinforcing layer has openings (3) for the chip, in which the openings are as large as the dimensions of the chips. Each chip is surrounded by a reinforced frame and is embedded in the cavity produced.

公开(公告)号：DE10327882A1

公开(公告)日：2005-01-27

申请号：DE10327882

申请日：2003-06-19

Applicant: INFINEON TECHNOLOGIES AG

Inventor： REIS MARTIN ,  NOCKE KERSTIN ,  BENDER CARSTEN

IPC: H05K3/34 ,  H01L23/488

Abstract: Semiconductor modules with BGA or similar components contain chips secured on substrate by die-attach material. At least one ball side substrate is coated with solder stop lacquer and an opposite side carries solder balls on contact pads for linking to contact pads on PCBs. Substrate chip side is capped. In region of contact pads, structures of lacquer are so changed, as to provide such direction of voltages for considerable reduction of mechanical stress.

公开(公告)号：DE102005051036A1

公开(公告)日：2007-04-26

申请号：DE102005051036

申请日：2005-10-25

Applicant: INFINEON TECHNOLOGIES AG

Inventor： REISS MARTIN ,  BLASZCZAK STEPHAN ,  SCHEIBE BERND ,  MUELLER SEBASTIAN ,  NOCKE KERSTIN

IPC: H01L21/50 ,  H01L23/12 ,  H01L23/28

Abstract: A method for fabricating an integrated module involves preparing a supporting substrate (2), especially with a chip mounted thereon, making available a holding structure in or on the substrate (2) and providing a housing material to form a housing (5) so that the housing material functions together with the holding structure in the substrate, to take up a lateral tensioning between the housing (5) and the substrate (2). An independent claim is included for (1) (A) A module or building block with support substrate and (2) (B) A module- substrate with several inter-joined substrates.

公开(公告)号：DE10347320A1

公开(公告)日：2005-05-19

申请号：DE10347320

申请日：2003-10-08

Applicant: INFINEON TECHNOLOGIES AG

Inventor： REISS MARTIN ,  BLASZCZAK STEPHAN ,  SCHEIBE BERND ,  BENDER CARSTEN ,  NOCKE KERSTIN

IPC: H01L23/00 ,  H01L23/13 ,  H01L23/12 ,  H01L23/50

Abstract: A tape (2) glues a chip (3) face down on a substrate (1) with a passage way, a bonding channel (4) and a structured metal coating (5) on an underside, which has grid-type contact pads (6) and bonding pads (7) near the edge of the bonding channel to interlink these electrically. An independent claim is also included for a structure for a chip package to be constructed on a substrate with a chip mounted face down on the substrate and with protection to its rear side and edges by means of a sealing compound firmly bonded to the substrate.

公开(公告)号：DE102006009478A1

公开(公告)日：2007-08-30

申请号：DE102006009478

申请日：2006-02-27

Applicant: INFINEON TECHNOLOGIES AG

Inventor： REISS MARTIN ,  MUELLER SEBASTIAN ,  NOCKE KERSTIN

IPC: H01L21/60 ,  H01L21/58 ,  H01L23/13 ,  H01L23/488

Abstract: The method involves connecting a contact (4) of a die with a contact of a substrate by electrically conducting bumps that are made of conducting adhesives (7). The bumps are applied on the contact of the die by an electrically conducting two-stage hardened adhesive. The bumps are hardened after applying the adhesive in a stage, and the die with the bumps made of the hardened adhesive is applied on the substrate by contact of the bumps with the contact of the substrate. The adhesive is hardened during manufacturing of an adhesive connection between the die and the substrate in another stage. Independent claims are also included for the following: (1) a substrate for implementing a flip chip bonding method (2) a semiconductor component with a die.

公开(公告)号：DE102006009540A1

公开(公告)日：2007-02-08

申请号：DE102006009540

申请日：2006-02-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： REISS MARTIN ,  NOCKE KERSTIN ,  GRASSME OLIVER ,  BENDER CARSTEN ,  PARK SOO GIL ,  PFEIFFER FRANK

IPC: H01L23/14 ,  H01L23/48

公开(公告)号：DE10341206A1

公开(公告)日：2005-04-14

申请号：DE10341206

申请日：2003-09-04

Applicant: INFINEON TECHNOLOGIES AG

Inventor： REIS MARTIN ,  NOCKE KERSTIN ,  BENDER CARSTEN

IPC: H01L21/60 ,  H01L23/498 ,  H05K3/34 ,  H01L23/50

Abstract: Appliance for improving reliability of BGA solder connections between substrate (1) of BGA-component, whose contact pads (7) are fitted with solder balls or bumps (2) in asymmetric layout, and contacts of circuit board (5).Selected contact pads on substrate and/or contact faces (4) on circuit board and/or solder ball or bumps (9) of each BGA component have larger dimensions. Preferably larger contacts or solder balls or bumps (7-9) are fitted in corner positions of ball layout, with layout containing at least one larger solder ball or bump, with larger solder balls etc. located in possible increased stress.

公开(公告)号：DE10335182B4

公开(公告)日：2007-03-01

申请号：DE10335182

申请日：2003-07-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： REISS MARTIN ,  NOCKE KERSTIN ,  BENDER CARSTEN

IPC: H01L23/50 ,  H01L21/60 ,  H01L23/498 ,  H05K1/02 ,  H05K1/03 ,  H05K1/11 ,  H05K3/34 ,  H05K3/38

Abstract: The invention relates to an arrangement for improving module reliability, in particular the reliability of soldered connections on semiconductor products with BGA or BGA-like components to a substrate on which chips are attached by a die attach material, in particular substrate-based IC packages, solder balls mounted on the side that is opposite from the chip, on contact pads of the substrate on a patterned copper foil, being provided for the electrical connection to printed circuit boards, and the chip and the substrate on the chip side being encapsulated with a mold cap. With the invention, it is intended to provide an arrangement for improving module reliability with which stress acting on the solder balls during alternating thermal loading is reduced. According to the invention, an intermediate layer (3) which consists of a compliant or flexible material is arranged at least between the contact pads (2) and the substrate (1) or the printed circuit board.

公开(公告)号：DE102005033156A1

公开(公告)日：2007-01-25

申请号：DE102005033156

申请日：2005-07-13

Applicant: INFINEON TECHNOLOGIES AG

Inventor： REISS MARTIN ,  NOCKE KERSTIN

IPC: H01L23/14 ,  B32B5/26 ,  B32B27/12 ,  C08J5/04 ,  C08J5/24 ,  H01L23/50

Abstract: Substrate (2) for IC packs includes on one side chip and on other side solder balls for electric connection to terminal contacts of chip. There are severasl fibre structures contained in wiring including foils (prepregs).Prepregs (3-1,3-2,3-3) are bound in resin and have different thermomechanical properties. They form sandwich of laminated foils as substrate. Preferably, main orientation of fibre structure in each prepreg is different.

公开(公告)号：DE102004029586A1

公开(公告)日：2006-01-12

申请号：DE102004029586

申请日：2004-06-18

Applicant: INFINEON TECHNOLOGIES AG

Inventor： REISS MARTIN ,  LEGEN ANTON ,  CARMONA MANUEL ,  NOCKE KERSTIN

IPC: H01L23/04

Abstract: The invention, which relates to an electronic component with a semiconductor chip, which is connected to a carrier substrate and surrounded by a housing, is based on presenting a substrate-based, housed electronic component, which enables the continuous release of the internal vapor pressure arising when the electronic component is heated, and at the same time can be produced inexpensively using the known and tried-and-tested methods and materials. According to embodiments of the invention, this is achieved by virtue of the fact that the carrier substrate comprises a plurality of hollow vias open on both sides, which vias are distributed areally in at least one section of the carrier substrate that is covered by the housing.