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公开(公告)号:DE102006026970A1
公开(公告)日:2007-12-13
申请号:DE102006026970
申请日:2006-06-09
Applicant: INFINEON TECHNOLOGIES AG
Inventor: ROEWER FALK , SICHERT CHRISTIAN , SCHNABEL FLORIAN
IPC: G11C11/4093
Abstract: The memory has a memory layer (100) with memory cells to store data. A control circuit (40) controls a memory circuit (20) e.g. latch, in such a manner that intermediately stored data is outputted to a side or to another side of a clock signal from the memory circuit during write access and the intermediately stored data is outputted to a third side and supplied to the memory layer. The control circuit controls the memory circuit in such a manner that the data supplied from the memory layer and the data are stored in the memory circuit during read access. An independent claim is also included for a method of operating an integrated semiconductor memory.