公开(公告)号：DE10218097A1

公开(公告)日：2003-11-13

申请号：DE10218097

申请日：2002-04-23

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHLAFFER ANDREAS

IPC: G05F3/24 ,  G11C16/14

Abstract: Circuit arrangement for voltage regulation having a voltage divider and a regulating circuit. The voltage divider is arranged between a first potential and a reference-ground potential and has a plurality of diodes connected in series, wherein an output voltage is tapped off at a terminal of one of the diodes. The regulating circuit, to which the output voltage and a reference voltage are applied, regulates the first potential based on a comparison of the output voltage with the reference voltage. The divider ratio of the voltage divider is altered by activating or deactivating one or more of the diodes, and is additionally altered by setting a magnitude of a voltage drop across at least one of the diodes.

公开(公告)号：DE10332864B4

公开(公告)日：2007-04-26

申请号：DE10332864

申请日：2003-07-18

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SAN SEBASTIAN IKER ,  WEDER UWE ,  SCHLAFFER ANDREAS ,  HAIDER GUENTER ,  NEBEL GERHARD

IPC: G05F3/16 ,  G05F1/10 ,  G05F3/26

Abstract: A voltage regulator having a current mirror for decoupling a partial current icluding a first NMOS transistor as a series transistor. In addition, the voltage regulator has a second NMOS transistor, which forms a current mirror with the first NMOS transistor. Furthermore, in the case of the voltage regulator, the first NMOS transistor is connected in series with a first PMOS transistor and a third transistor. The second NMOS transistor is likewise connected in series with a second PMOS transistor and a fourth transistor, the control inputs of the first and second PMOS transistors being connected to one another and the control inputs of the third and fourth transistors being connected to a control terminal for setting the magnitude of the partial current to be decoupled.

公开(公告)号：DE10332864A1

公开(公告)日：2005-02-24

申请号：DE10332864

申请日：2003-07-18

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SAN SEBASTIAN IKER ,  WEDER UWE ,  SCHLAFFER ANDREAS ,  HAIDER GUENTER ,  NEBEL GERHARD

IPC: G05F3/26 ,  G05F3/16 ,  G05F1/10

Abstract: A voltage regulator having a current mirror for decoupling a partial current icluding a first NMOS transistor as a series transistor. In addition, the voltage regulator has a second NMOS transistor, which forms a current mirror with the first NMOS transistor. Furthermore, in the case of the voltage regulator, the first NMOS transistor is connected in series with a first PMOS transistor and a third transistor. The second NMOS transistor is likewise connected in series with a second PMOS transistor and a fourth transistor, the control inputs of the first and second PMOS transistors being connected to one another and the control inputs of the third and fourth transistors being connected to a control terminal for setting the magnitude of the partial current to be decoupled.

公开(公告)号：DE10336090A1

公开(公告)日：2005-03-10

申请号：DE10336090

申请日：2003-08-06

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHLAFFER ANDREAS

IPC: H02M3/07

Abstract: A charge pump control circuit comprises charge pump circuit (1), voltage regulator (3) with reference (32) and signal (33) inputs and control output (31), a control circuit (2) with reference input (21) and feedback input (23) coupled with the voltage regulator and a comparison between the feedback and reference-dependent control signals (VS). An independent claim is also included for a process to reduce potential oscillations using the above.

公开(公告)号：DE50305682D1

公开(公告)日：2006-12-28

申请号：DE50305682

申请日：2003-03-13

Applicant: INFINEON TECHNOLOGIES AG

Inventor： FLEISCHMANN PETER ,  NEBEL GERHARD ,  SCHLAFFER ANDREAS ,  WEDER UWE

IPC: G05F1/00 ,  G11C5/14 ,  H02M3/07

公开(公告)号：DE50305578D1

公开(公告)日：2006-12-14

申请号：DE50305578

申请日：2003-04-07

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHLAFFER ANDREAS

IPC: G05F3/24

Abstract: Circuit arrangement for voltage regulation having a voltage divider and a regulating circuit. The voltage divider is arranged between a first potential and a reference-ground potential and has a plurality of diodes connected in series, wherein an output voltage is tapped off at a terminal of one of the diodes. The regulating circuit, to which the output voltage and a reference voltage are applied, regulates the first potential based on a comparison of the output voltage with the reference voltage. The divider ratio of the voltage divider is altered by activating or deactivating one or more of the diodes, and is additionally altered by setting a magnitude of a voltage drop across at least one of the diodes.

公开(公告)号：DE10218097B4

公开(公告)日：2004-02-26

申请号：DE10218097

申请日：2002-04-23

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHLAFFER ANDREAS

IPC: G05F3/24 ,  G11C16/14

Abstract: Circuit arrangement for voltage regulation having a voltage divider and a regulating circuit. The voltage divider is arranged between a first potential and a reference-ground potential and has a plurality of diodes connected in series, wherein an output voltage is tapped off at a terminal of one of the diodes. The regulating circuit, to which the output voltage and a reference voltage are applied, regulates the first potential based on a comparison of the output voltage with the reference voltage. The divider ratio of the voltage divider is altered by activating or deactivating one or more of the diodes, and is additionally altered by setting a magnitude of a voltage drop across at least one of the diodes.

公开(公告)号：DE10223727A1

公开(公告)日：2003-10-23

申请号：DE10223727

申请日：2002-05-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： WEDER UWE ,  FLEISCHMANN PETER ,  SCHLAFFER ANDREAS ,  NEBEL GERHARD

IPC: G11C5/14 ,  H02M3/07 ,  G05F1/10