公开(公告)号：WO03069629A2

公开(公告)日：2003-08-21

申请号：PCT/DE0300224

申请日：2003-01-28

Applicant: INFINEON TECHNOLOGIES AG ,  GAMPERL SUSANNE ,  TSCHETERNIGG SIEGFRIED ,  WEDEL ARMIN

Inventor： GAMPERL SUSANNE ,  TSCHETERNIGG SIEGFRIED ,  WEDEL ARMIN

IPC: G11C16/22

CPC classification number: G11C16/22

Abstract: The column lines of the memory matrix are alternatively used as detector lines. The selected detector lines are, together with the relevant column line, respectively impinged upon with a precharge voltage prior to the read-out of the memory columns. If a detector line loses its precharge level during the read-out of the memory cells, an incidence of light runs out and a corresponding alarm function is triggered. Preferably, adjacent column lines are connected to the respectively selected column lines for data transmission as detector lines.

Abstract translation: 所述存储器阵列的列线替换地被用作检测器线。 所选择的检测器线当在之前的存储器列的读出每种情况下起作用，与相应的列线的预充电电压到一起。 当检测器线的存储器单元的读取过程中失去其预充电电平，假定光并触发相应的警报功能。 优选地，相邻的列线被连接作为检测器行到所选择的每个数据传输列线。

公开(公告)号：WO0237637A2

公开(公告)日：2002-05-10

申请号：PCT/DE0104170

申请日：2001-11-06

Applicant: INFINEON TECHNOLOGIES AG ,  TSCHETERNIGG SIEGFRIED ,  WEDEL ARMIN

Inventor： TSCHETERNIGG SIEGFRIED ,  WEDEL ARMIN

IPC: H02J7/00 ,  G06K19/07 ,  G06K19/073 ,  H02J1/00 ,  H02J9/06 ,  H02J

CPC classification number: G06K19/073

Abstract: The invention relates to a method for controlling the charging and discharging phases of a back-up capacitor (C) on a data support, whereby the back-up capacitor (C) is firstly discharged to a particular voltage level before charging. The discharging occurs at a constant current (iD). It is thus secured that it is not possible to tell the charge state of the capacitor (C) before discharge, by means of the charging current from the back- up capacitor (C). It is thus no longer possible to draw conclusions about the currents flowing during calculation operations in a data processing unit (1), which have security implications. In an advantageous circuit arrangement, a constant current source (3) is formed by means of a current mirror circuit and the voltage of the back-up capacitor (C) compared with a band-gap reference by means of a comparator (2).

Abstract translation: 本发明涉及一种用于控制充电和放电的数据载体的一个备用电容器（C）的阶段，其中，所述备用电容器仅充电到规定的电压电平之前，排出（C）的方法。 放电以恒定电流（ID）执行。 这确保了平滑电容器的充电电流的基础上（C）不erkenbarr电荷的电容器（C）的状态之前被卸载。 其特征在于结论，在与安全相关的算术运算（1）中的处理单元的时间流入Strèome不再可能的。 在恒定电流源的ainer有利的电路装置（3）由一电流镜象电路形成，并且比较器（2）在整个备用电容器（C）上的电压与带隙基准进行比较。

公开(公告)号：DE10054970A1

公开(公告)日：2002-05-23

申请号：DE10054970

申请日：2000-11-06

Applicant: INFINEON TECHNOLOGIES AG

Inventor： TSCHETERNIGG SIEGFRIED ,  WEDEL ARMIN

IPC: H02J7/00 ,  G06K19/07 ,  G06K19/073 ,  H02J1/00 ,  H02J9/06 ,  G06F1/26

Abstract: A method for controlling the charging and discharging phases of a backup capacitor for a data storage medium has the step where the backup capacitor is first discharged to a defined voltage level before it is charged. The capacitor is discharged using a constant current. This ensures that the charging current for the backup capacitor cannot be used to identify what the charge-state of the capacitor was before discharging. Therefore, it is no longer possible to infer the currents that flowed during security-related arithmetic operations in a data processing unit. In one advantageous circuit configuration, a constant current source is formed by a current-mirror circuit, and a comparator is used to compare the voltage on the backup capacitor with a bandgap reference.

公开(公告)号：DE50301613D1

公开(公告)日：2005-12-15

申请号：DE50301613

申请日：2003-01-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GAMPERL SUSANNE ,  TSCHETERNIGG SIEGFRIED ,  WEDEL ARMIN

IPC: G11C16/22

Abstract: EEPROM memory matrix in which column lines are alternatively used as detector lines. A precharge voltage is applied to selected detector lines together with the relevant column line in each case before read-out of the memory columns. If a detector line loses its precharge level during the read-out of the memory cells, light incidence is assumed and a corresponding alarm function is triggered. Preferably column lines adjacent to the column lines that are respectively selected for the data transmission are connected as detector lines.

公开(公告)号：BR0115142A

公开(公告)日：2003-10-07

申请号：BR0115142

申请日：2001-11-06

Applicant: INFINEON TECHNOLOGIES AG

Inventor： TSCHETERNIGG SIEGFRIED ,  WEDEL ARMIN

IPC: H02J7/00 ,  G06K19/07 ,  G06K19/073 ,  H02J1/00 ,  H02J9/06

Abstract: A method for controlling the charging and discharging phases of a backup capacitor for a data storage medium has the step where the backup capacitor is first discharged to a defined voltage level before it is charged. The capacitor is discharged using a constant current. This ensures that the charging current for the backup capacitor cannot be used to identify what the charge-state of the capacitor was before discharging. Therefore, it is no longer possible to infer the currents that flowed during security-related arithmetic operations in a data processing unit. In one advantageous circuit configuration, a constant current source is formed by a current-mirror circuit, and a comparator is used to compare the voltage on the backup capacitor with a bandgap reference.

公开(公告)号：DE50105327D1

公开(公告)日：2005-03-17

申请号：DE50105327

申请日：2001-11-06

Applicant: INFINEON TECHNOLOGIES AG

Inventor： TSCHETERNIGG SIEGFRIED ,  WEDEL ARMIN

IPC: H02J7/00 ,  G06K19/07 ,  G06K19/073 ,  H02J1/00 ,  H02J9/06

Abstract: A method for controlling the charging and discharging phases of a backup capacitor for a data storage medium has the step where the backup capacitor is first discharged to a defined voltage level before it is charged. The capacitor is discharged using a constant current. This ensures that the charging current for the backup capacitor cannot be used to identify what the charge-state of the capacitor was before discharging. Therefore, it is no longer possible to infer the currents that flowed during security-related arithmetic operations in a data processing unit. In one advantageous circuit configuration, a constant current source is formed by a current-mirror circuit, and a comparator is used to compare the voltage on the backup capacitor with a bandgap reference.

公开(公告)号：DE10206186A1

公开(公告)日：2003-09-04

申请号：DE10206186

申请日：2002-02-14

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GAMPERL SUSANNE ,  WEDEL ARMIN ,  TSCHETERNIGG SIEGFRIED

IPC: G11C16/22

Abstract: EEPROM memory matrix in which column lines are alternatively used as detector lines. A precharge voltage is applied to selected detector lines together with the relevant column line in each case before read-out of the memory columns. If a detector line loses its precharge level during the read-out of the memory cells, light incidence is assumed and a corresponding alarm function is triggered. Preferably column lines adjacent to the column lines that are respectively selected for the data transmission are connected as detector lines.

公开(公告)号：DE10206186B4

公开(公告)日：2010-01-28

申请号：DE10206186

申请日：2002-02-14

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GAMPERL SUSANNE ,  WEDEL ARMIN ,  TSCHETERNIGG SIEGFRIED

IPC: G11C16/22 ,  G06K19/073

Abstract: EEPROM memory matrix in which column lines are alternatively used as detector lines. A precharge voltage is applied to selected detector lines together with the relevant column line in each case before read-out of the memory columns. If a detector line loses its precharge level during the read-out of the memory cells, light incidence is assumed and a corresponding alarm function is triggered. Preferably column lines adjacent to the column lines that are respectively selected for the data transmission are connected as detector lines.

公开(公告)号：AT289103T

公开(公告)日：2005-02-15

申请号：AT01993048

申请日：2001-11-06

Applicant: INFINEON TECHNOLOGIES AG

Inventor： TSCHETERNIGG SIEGFRIED ,  WEDEL ARMIN

IPC: H02J7/00 ,  G06K19/07 ,  G06K19/073 ,  H02J1/00 ,  H02J9/06

Abstract: A method for controlling the charging and discharging phases of a backup capacitor for a data storage medium has the step where the backup capacitor is first discharged to a defined voltage level before it is charged. The capacitor is discharged using a constant current. This ensures that the charging current for the backup capacitor cannot be used to identify what the charge-state of the capacitor was before discharging. Therefore, it is no longer possible to infer the currents that flowed during security-related arithmetic operations in a data processing unit. In one advantageous circuit configuration, a constant current source is formed by a current-mirror circuit, and a comparator is used to compare the voltage on the backup capacitor with a bandgap reference.

公开(公告)号：DE50007780D1

公开(公告)日：2004-10-21

申请号：DE50007780

申请日：2000-05-17

Applicant: INFINEON TECHNOLOGIES AG

Inventor： TSCHETERNIGG SIEGFRIED ,  ALLINGER ROBERT

IPC: G01R19/165 ,  G01R31/36 ,  G11C29/02 ,  H03K17/22

Abstract: A circuit configuration for detecting a functional disturbance has a first and a second differential amplifier. The outputs of the differential amplifiers are connected to the inputs of a gate. One input of the differential amplifiers is in each case connected to a reference potential terminal. The respective other input of the first and second differential amplifiers is connected to a monitoring means, which responds in the event of a change in the supply voltage at a supply potential terminal of the circuit configuration.