Method for dividing semiconductor substrate, and method for manufacturing semiconductor circuit arrangement
    1.
    发明专利
    Method for dividing semiconductor substrate, and method for manufacturing semiconductor circuit arrangement 有权
    用于分割半导体基板的方法以及制造半导体电路布置的方法

    公开(公告)号:JP2009099954A

    公开(公告)日:2009-05-07

    申请号:JP2008225837

    申请日:2008-09-03

    CPC classification number: H01L21/78

    Abstract: PROBLEM TO BE SOLVED: To highly reliably and cost-effectively divide a semiconductor substrate, by accurately, reliably and cost-effectively thinning a semiconductor substrate to a desired thickness, then dividing the thinned layer using a simple and mechanical method.
    SOLUTION: The method for dividing the semiconductor substrate 10 involves the process of providing the semiconductor substrate 10. At least one separating trench 15 is produced at a front side of the semiconductor substrate 10. At least one layer 20 is produced at the bottom of the at least one separating trench 15. The semiconductor substrate 10 is thinned at a rear side of the semiconductor substrate 10 at least as far as the layer 20 at the bottom of the at least one separating trench 15. The layer 20 is severed in order to divide the semiconductor substrate 10 into individual pieces.
    COPYRIGHT: (C)2009,JPO&INPIT

    Abstract translation: 要解决的问题:为了将半导体衬底准确可靠且成本有效地薄化到期望的厚度,将半导体衬底高度可靠且经济地划分,然后使用简单且机械的方法分割薄层。 解决方案:用于分割半导体衬底10的方法包括提供半导体衬底10的工艺。在半导体衬底10的前侧产生至少一个分离沟槽15.至少一个层20在 至少一个分离沟槽15的底部。半导体衬底10在半导体衬底10的后侧至少与在至少一个分离沟槽15的底部的层20一样薄。层20被切断 以便将半导体衬底10分成单独的部分。 版权所有(C)2009,JPO&INPIT

    3.
    发明专利
    未知

    公开(公告)号:DE102006048586B4

    公开(公告)日:2008-10-30

    申请号:DE102006048586

    申请日:2006-10-13

    Abstract: The method involves applying a self-supporting, prefabricated metal structure (30) on a front side (11) of a semiconductor wafer (10) and isolating a semiconductor device after application of the metal structure. The metal structure includes a multiplicity of support units that are attached to the semiconductor device, where the support units are connected by bars. Hollow and/or intermediate spaces on the front side of the semiconductor wafer are filled with an insulating material. The wafer is thinned after the application of the metal structure. Independent claims are also included for the following: (1) a semiconductor wafer with a front side (2) a manufacturing device for semiconductor devices.

    Making semiconductor layer with compensation structure for MOS transistor manufacture employs thermal oxidation conversion reaction influencing local dopant concentrations

    公开(公告)号:DE10316710B3

    公开(公告)日:2004-08-12

    申请号:DE10316710

    申请日:2003-04-11

    Abstract: Semiconductor layer (110) with first side (101) is prepared and doped with charge carriers of first and second types. Trench (20) extends into doped layer (110). Thermal oxidation conversion reaction changes regions of first semiconductor layer in sidewall regions of trench into semiconductor connecting layers (30). Concentration changes in both types of charge carrier result in regions (40) of layer (110) adjacent to connecting layer. A semiconductor layer (110) with a first side (101) is prepared. This is doped throughout with charge carriers of first and second conduction types. A trench (20) extends into the doped semiconductor layer (110). A conversion reaction (thermal oxidation) is brought about. This changes regions of the first semiconductor layer in sidewall regions of the trench into semiconductor connecting layers (30). Concentration changes in both types of charge carrier result, in regions (40) of the semiconductor layer (110) adjacent to the semiconductor connecting layer. An independent claim is included for a corresponding manufacturing process.

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