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公开(公告)号:DE102006046869A1
公开(公告)日:2008-04-03
申请号:DE102006046869
申请日:2006-10-02
Applicant: INFINEON TECHNOLOGIES AG
Inventor: WEBER HANS MARTIN , SANTOS RODRIGUEZ FRANCISCO JAV , ZUNDEL MARKUS
IPC: H01L21/302
Abstract: The method involves thinning a semiconductor wafer (10) in which functional areas of a semiconductor device are formed. A trench with preset depth is produced in a front side (12) of the semiconductor wafer. The trench is used as a thickness-criterion for controlling the thinning of the wafer. An electrode is provided in the trench, and electrical resistance and electrical capacitance between the electrode and a rear side (13) of the semiconductor wafer is measured. Independent claims are also included for the following: (1) a manufacturing device for a semiconductor device, comprising a holding device (2) a semiconductor wafer, comprising a front side and a rear side.
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公开(公告)号:DE102005011106A1
公开(公告)日:2006-09-21
申请号:DE102005011106
申请日:2005-03-10
Applicant: INFINEON TECHNOLOGIES AG
Abstract: Binding two wafers comprises preparing a first wafer (1) and second wafer (2) with a binding surface; applying a binder (3A) (preferably calcium fluoride) at the binding surface of at least one of the wafers; and joining the wafers at the binding surfaces. Independent claims are included for: (a) a wafer layer comprising the first wafer with the binding surface; a binding layer (containing calcium fluoride), which is applied at the binding surface of the first wafer; and the second wafer, which is applied on the binding layer; and (b) a process for dissolving the binder in wafer layer structure comprising dissolving the wafer layer structures in a solvent.
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公开(公告)号:DE102005051812A1
公开(公告)日:2007-02-01
申请号:DE102005051812
申请日:2005-10-27
Applicant: INFINEON TECHNOLOGIES AG
Inventor: HARFMANN MARKUS , BINTER ALEXANDER , SCHAGERL GUENTER , SANTOS RODRIGUEZ FRANCISCO JAV , PRAX EMIL , FATHULLA AHMAD
IPC: H01L21/306 , G01B11/06 , H01L21/66
Abstract: A device with etching equipment for etching complete layers or parts of layers to be removed from semiconductor wafers (5) with a liquid etching medium comprises a spectrometer (13) for measuring the concentration of the etching medium. Independent claims are also included for the following. (1) etching complete layers or parts of layers to be removed from semiconductor wafers; and (2) the application of a spectrometer in an etching device.
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公开(公告)号:DE102006042026A1
公开(公告)日:2008-04-03
申请号:DE102006042026
申请日:2006-09-07
Applicant: INFINEON TECHNOLOGIES AG
Inventor: LACKNER GERALD , MAIER CHRISTIAN , SANTOS RODRIGUEZ FRANCISCO JAV
IPC: H01L21/68
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公开(公告)号:DE102005007821A1
公开(公告)日:2006-09-14
申请号:DE102005007821
申请日:2005-02-21
Applicant: INFINEON TECHNOLOGIES AG
Inventor: SANTOS RODRIGUEZ FRANCISCO JAV , UNTERWEGER JOSEF , GANARIN WERNER
IPC: H01L21/67
Abstract: The device has a sub-carrier arranged between mounting surfaces of a mounting carrier and a wafer to be processed. The sub-carrier is formed in such a manner that the sub-carrier forms an adapter wafer, which comprises concentrically arranged retaining blocks (3, 4, 5, 6) for topographical positioning of the wafer to be processed. The adapter wafer is provided with an exhaust opening that is connected with a negative pressure source.
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公开(公告)号:DE102006046788A1
公开(公告)日:2008-04-03
申请号:DE102006046788
申请日:2006-10-02
Applicant: INFINEON TECHNOLOGIES AG
Inventor: KROENER FRIEDRICH , SANTOS RODRIGUEZ FRANCISCO JAV
IPC: H01L21/331 , H01L29/739
Abstract: The method involves preparing a semiconductor substrate (1) and implementing a processing on back side (RS) of the semiconductor substrate. Isolating trenches (G) are built in the back side of the semiconductor substrate. A carrier substrate (2) is fastened on the back side of the semiconductor substrate. Another carrier substrate is fastened on the front side of the semiconductor substrate and the former carrier substrate is separated. The latter carrier substrate is fastened on the back side of the semiconductor substrate and the semiconductor circuit arrangement is isolated.
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公开(公告)号:DE102006043163A1
公开(公告)日:2008-03-27
申请号:DE102006043163
申请日:2006-09-14
Applicant: INFINEON TECHNOLOGIES AG
Inventor: KOBLINSKI CARSTEN VON , KROENER FRIEDRICH , SANTOS RODRIGUEZ FRANCISCO JAV , KRAFT DANIEL , HELLMUND OLIVER
IPC: H01L23/482 , H01B1/02 , H01L21/479
Abstract: A method for producing a composite material, associated composite material and associated semiconductor circuit arrangements is disclosed. A plurality of first electrically conducting material particles are applied to a carrier substrate and a second electrically conducting material is galvanically deposited on a surface of the first material particles in such a way that the second material mechanically and electrically bonds the plurality of first material particles to one another.
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公开(公告)号:DE102006030869A1
公开(公告)日:2008-01-10
申请号:DE102006030869
申请日:2006-07-04
Applicant: INFINEON TECHNOLOGIES AG
Inventor: FATHULLA AHMAD , LACKNER GERALD , RUPP THOMAS , SANTOS RODRIGUEZ FRANCISCO JAV , SCHOENHERR HELMUT , SCHULZE HANS-JOACHIM
IPC: H01L21/306 , C30B25/02
Abstract: The production of a semiconductor wafer useful in e.g. chip cards, comprises providing a semiconductor substrate (1) from a first semiconductor material with a first surface and a second surface, which faces the first surface, applying a first semiconductor layer (2) from a second semiconductor material epitaxially on the second surface, and partially removing the substrate from the first semiconductor layer. The epitaxial application of a second semiconductor layer (3) from a third semiconductor material on the first semiconductor layer takes place to the desired target thickness. The production of a semiconductor wafer useful in e.g. chip cards, comprises providing a semiconductor substrate (1) from a first semiconductor material with a first surface and a second surface, which faces the first surface, applying a first semiconductor layer (2) from a second semiconductor material epitaxially on the second surface, and partially removing the substrate from the first semiconductor layer. The epitaxial application of a second semiconductor layer (3) from a third semiconductor material on the first semiconductor layer takes place to the desired target thickness. After the partial removing, the first semiconductor layer is partly removed via corroding. Before corroding a prefabricated device is attached as an etching mask at the first surface of the substrate. The device covers an external area of the first surface and limits an opening that releases an internal area of the first surface of the substrate, and is again removed after corroding. A semiconductor component (4) is formed in the first- and second semiconductor layer before the partial removing of the substrate.
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公开(公告)号:DE102006015781A1
公开(公告)日:2007-10-11
申请号:DE102006015781
申请日:2006-04-04
Applicant: INFINEON TECHNOLOGIES AG
Inventor: FATHULLA AHMAD , LACKNER GERALD , GROMMES WALTHER , SANTOS RODRIGUEZ FRANCISCO JAV
IPC: C30B33/00 , H01L21/302
Abstract: The semiconductor wafer useful for the production of electronic components, comprises inner area (2) arranged in the middle of the wafer, outer area (3), and first surface (4), which is formed of a semiconductor element in the inner area. The outer area extends from a rotating edge of the semiconductor wafer to the inner area. The inner area and the outer area are formed from the single piece semiconductor material. A step forms a transition from the outer area to the inner area. The outer area is thicker than the inner area. The semiconductor wafer useful for the production of electronic components, comprises inner area (2) arranged in the middle of the wafer, outer area (3), and first surface (4), which is formed of a semiconductor element in the inner area. The outer area extends from a rotating edge of the semiconductor wafer to the inner area. The inner area and the outer area are formed from the single piece semiconductor material. A step forms a transition from the outer area to the inner area. The outer area is thicker than the inner area and in comparison to the inner area occupies small portion of the semiconductor wafer. At the first surface a semiconductor element in the inner area is formed. An independent claim is included for a method for the production of semiconductor wafer.
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