公开(公告)号：DE69932472T2

公开(公告)日：2007-02-15

申请号：DE69932472

申请日：1999-05-31

Applicant: INFINEON TECHNOLOGIES AG

Inventor： TOBBEN DIRK ,  WEBER STEFAN J ,  BRINTZINGER AXEL

IPC: H01L21/768 ,  H01L21/82 ,  H01L23/525

Abstract: A method for forming a semiconductor integrated circuit having a fuse and an active device. A dielectric layer is formed over the fuse and over a contract region of the active device. Via holes are formed through selected regions of the dielectric layer exposing underlying portions of the fuse and underlying portions of a contact region of the active device. An electrically conductive material is deposited over the dielectric layer and through the via holes onto exposed portions of the fuse and the contact region. Portions of the electrically conductive material deposited onto the fuse are selectively removed while leaving portions of the electrically conductive material deposited onto the contact region of the active device. A fill material is disposed in the one of the fuse, a bottom portion of such filling material being spaced from the fuse.

公开(公告)号：DE60034611D1

公开(公告)日：2007-06-14

申请号：DE60034611

申请日：2000-02-04

Applicant: IBM ,  INFINEON TECHNOLOGIES AG

Inventor： WEBER STEFAN J ,  IGGULDEN ROY ,  NARAYAN CHANDRASEKHAR ,  BRINTZINGER AXEL CHRISTOPH ,  HOINKIS MARK ,  VAN DEN BERG ROBERT

IPC: H01H85/00 ,  H01H69/02 ,  H01L23/525 ,  H01L21/82

Abstract: A fuse for semiconductor devices in accordance with the present invention includes a substrate having a conductive path disposed on a surface thereof, a dielectric layer disposed on the substrate and a vertical fuse disposed perpendicularly to the surface through the dielectric layer and connecting to the conductive path, the vertical fuse forming a cavity having a liner material disposed along vertical surfaces of the cavity, the vertical surfaces being melted to blow the fuse. Methods for fabrication of the vertical fuse are also included.

公开(公告)号：DE69932472D1

公开(公告)日：2006-09-07

申请号：DE69932472

申请日：1999-05-31

Applicant: INFINEON TECHNOLOGIES AG

Inventor： TOBBEN DIRK ,  WEBER STEFAN J ,  BRINTZINGER AXEL

IPC: H01L21/768 ,  H01L21/82 ,  H01L23/525

Abstract: A method for forming a semiconductor integrated circuit having a fuse and an active device. A dielectric layer is formed over the fuse and over a contract region of the active device. Via holes are formed through selected regions of the dielectric layer exposing underlying portions of the fuse and underlying portions of a contact region of the active device. An electrically conductive material is deposited over the dielectric layer and through the via holes onto exposed portions of the fuse and the contact region. Portions of the electrically conductive material deposited onto the fuse are selectively removed while leaving portions of the electrically conductive material deposited onto the contact region of the active device. A fill material is disposed in the one of the fuse, a bottom portion of such filling material being spaced from the fuse.