公开(公告)号：DE60034611D1

公开(公告)日：2007-06-14

申请号：DE60034611

申请日：2000-02-04

Applicant: IBM ,  INFINEON TECHNOLOGIES AG

Inventor： WEBER STEFAN J ,  IGGULDEN ROY ,  NARAYAN CHANDRASEKHAR ,  BRINTZINGER AXEL CHRISTOPH ,  HOINKIS MARK ,  VAN DEN BERG ROBERT

IPC: H01H85/00 ,  H01H69/02 ,  H01L23/525 ,  H01L21/82

Abstract: A fuse for semiconductor devices in accordance with the present invention includes a substrate having a conductive path disposed on a surface thereof, a dielectric layer disposed on the substrate and a vertical fuse disposed perpendicularly to the surface through the dielectric layer and connecting to the conductive path, the vertical fuse forming a cavity having a liner material disposed along vertical surfaces of the cavity, the vertical surfaces being melted to blow the fuse. Methods for fabrication of the vertical fuse are also included.

公开(公告)号：DE69932664T2

公开(公告)日：2007-08-09

申请号：DE69932664

申请日：1999-02-27

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BRINTZINGER AXEL CHRISTOPH ,  RAMACHANDRAN RAVIKUMAR ,  SRINIVASAN SENTHIL KUMAR

IPC: H01L21/302 ,  H01L21/311 ,  H01L23/525

Abstract: A method and apparatus for protecting a neighboring area that is adjacent to a first area that is to be etched. The method includes creating a guard cell substantially surrounding the first area, but excluding the neighboring area. The guard cell is formed of a material that is substantially selective to the etch process subsequently employed to etch within the first area. After the guard cell is formed, an etch is performed within the first area, while the guard cell prevents etching of the neighboring are outside the guard cell.

公开(公告)号：DE69932664D1

公开(公告)日：2006-09-21

申请号：DE69932664

申请日：1999-02-27

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BRINTZINGER AXEL CHRISTOPH ,  RAMACHANDRAN RAVIKUMAR ,  SRINIVASAN SENTHIL KUMAR

IPC: H01L21/302 ,  H01L21/311 ,  H01L23/525

Abstract: A method and apparatus for protecting a neighboring area that is adjacent to a first area that is to be etched. The method includes creating a guard cell substantially surrounding the first area, but excluding the neighboring area. The guard cell is formed of a material that is substantially selective to the etch process subsequently employed to etch within the first area. After the guard cell is formed, an etch is performed within the first area, while the guard cell prevents etching of the neighboring are outside the guard cell.

公开(公告)号：JP2000243213A

公开(公告)日：2000-09-08

申请号：JP2000046289

申请日：2000-02-23

Applicant: INFINEON TECHNOLOGIES CORP ,  IBM

Inventor： WEBER STEFAN J ,  IGGULDEN ROY ,  NARAYAN CHANDRASEKHAR ,  BRINTZINGER AXEL CHRISTOPH ,  HOINKIS MARK ,  VAN DEN BERG ROBERT

IPC: H01H85/00 ,  H01H69/02 ,  H01L21/82 ,  H01L23/525

Abstract: PROBLEM TO BE SOLVED: To provide a method for shrinking an area for a fuse to occupy on a semiconductor tip, and to adjust a fuse resistance relative to a fuse of a semiconductor device. SOLUTION: A fuse for a semiconductor is formed, so as to have a substrate 12 having a conductive passage disposed on its surface, a dielectric layer 14 disposed on the substrate, and a vertical fuse 110 vertically disposed on the surface. The vertical fuse penetrates through the dielectric layer 14 and is connected to the conductive passage. The vertical fuse also has a hole 108, a liner material is disposed on its vertical surface, and the fuse is cut off with fusing of the liner material along the vertical surface.

公开(公告)号：DE60034611T2

公开(公告)日：2008-01-31

申请号：DE60034611

申请日：2000-02-04

Applicant: QIMONDA AG ,  IBM

Inventor： WEBER STEFAN J ,  IGGULDEN ROY ,  NARAYAN CHANDRASEKHAR ,  BRINTZINGER AXEL CHRISTOPH ,  HOINKIS MARK ,  VAN DEN BERG ROBERT

IPC: H01H85/00 ,  H01H69/02 ,  H01L23/525 ,  H01L21/82

Abstract: A fuse for semiconductor devices in accordance with the present invention includes a substrate having a conductive path disposed on a surface thereof, a dielectric layer disposed on the substrate and a vertical fuse disposed perpendicularly to the surface through the dielectric layer and connecting to the conductive path, the vertical fuse forming a cavity having a liner material disposed along vertical surfaces of the cavity, the vertical surfaces being melted to blow the fuse. Methods for fabrication of the vertical fuse are also included.