公开(公告)号：JP2001257160A

公开(公告)日：2001-09-21

申请号：JP2001004180

申请日：2001-01-11

Applicant: INFINEON TECHNOLOGIES AG

Inventor： EBERTSEDER EVA ,  LEHR MATTHIAS ,  WERNEKE TORSTEN ,  HANEBECK JOCHEN ,  PAHLITZSCH JURGEN

IPC: G03F9/00 ,  H01L21/027 ,  H01L21/304 ,  H01L21/306 ,  H01L21/3205 ,  H01L23/52 ,  H01L23/544

Abstract: PROBLEM TO BE SOLVED: To make an alignment mark produceable without requiring much labor and, at the same time, surely detectable by means of a measuring apparatus. SOLUTION: A contact hole 4 and an alignment groove 5 are formed through an insulating layer 2 by etching the layer 2 until the bottoms of the hole 4 and groove 5 reach a first metallic layer 3, and a metal 6 is caused to deposit in the groove 5 and hole 4. Continuously, the surface of the metal 6 is caused to subside within the positioned extent of the groove 5 by the CMP method, so as to form a profile for the alignment mark formed on a second metallic layer 9 caused to deposit on the insulating layer 2.

公开(公告)号：DE10043948A1

公开(公告)日：2002-03-21

申请号：DE10043948

申请日：2000-09-06

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HASSMANN JENS ,  PFORR RAINER ,  WERNEKE TORSTEN

IPC: G03F7/20 ,  G03F9/00

Abstract: The alignment error compensation method has each initial exposure field (A1,A2,A3) illuminated by a first exposure device associated with a number of secondary exposure fields (B11,B12,B21,..) illuminated by a second exposure device and arranged in exposure field groups (B1,B2,B3). The alignment error between the exposure planes is measured via at one secondary exposure field and the corresponding initial exposure field, for calculation of individual adjustment correction values for the second exposure device.

公开(公告)号：DE50011437D1

公开(公告)日：2005-12-01

申请号：DE50011437

申请日：2000-12-18

Applicant: INFINEON TECHNOLOGIES AG

Inventor： EBERTSEDER EVA ,  HANEBECK JOCHEN ,  LEHR DR ,  PAHLITZSCH JUERGEN ,  WERNEKE TORSTEN

IPC: G03F9/00 ,  H01L21/027 ,  H01L21/304 ,  H01L21/306 ,  H01L21/3205 ,  H01L23/52 ,  H01L23/544

Abstract: Production of justifying marks in a structure with integrated circuits comprises applying a first planar metal layer (3) over a semiconductor substrate (1) with integrated circuits; applying an insulating layer (2) to the metal layer; etching contact holes and justifying trenches in the insulating layer; inserting metal (6) into the trenches and contact holes and treating the surface of the insulating layer by chemical-mechanical polishing; and depositing a second metal layer (9) onto the insulating layer to produce recesses (8) which form the justifying marks. Preferred Features: The first metal layer is made of AlCu. The second metal layer is made of W. The insulating layer consists of an oxide layer made of SiO2.

公开(公告)号：DE10043948C2

公开(公告)日：2003-04-17

申请号：DE10043948

申请日：2000-09-06

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HASSMANN JENS ,  PFORR RAINER ,  WERNEKE TORSTEN

IPC: G03F7/20 ,  G03F9/00

公开(公告)号：DE10000759C1

公开(公告)日：2001-05-23

申请号：DE10000759

申请日：2000-01-11

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HANEBECK JOCHEN ,  PAHLITZSCH JUERGEN ,  EBERTSEDER EVA ,  WERNEKE TORSTEN ,  LEHR MATTHIAS

IPC: G03F9/00 ,  H01L21/027 ,  H01L21/304 ,  H01L21/306 ,  H01L21/3205 ,  H01L23/52 ,  H01L23/544 ,  H01L21/8242 ,  H01L21/768

Abstract: Production of justifying marks in a structure with integrated circuits comprises applying a first planar metal layer (3) over a semiconductor substrate (1) with integrated circuits; applying an insulating layer (2) to the metal layer; etching contact holes and justifying trenches in the insulating layer; inserting metal (6) into the trenches and contact holes and treating the surface of the insulating layer by chemical-mechanical polishing; and depositing a second metal layer (9) onto the insulating layer to produce recesses (8) which form the justifying marks. Preferred Features: The first metal layer is made of AlCu. The second metal layer is made of W. The insulating layer consists of an oxide layer made of SiO2.