公开(公告)号：WO02054446A3

公开(公告)日：2003-11-06

申请号：PCT/US0147380

申请日：2001-12-04

Applicant: INFINEON TECHNOLOGIES CORP

Inventor： BARTH HANS-JOACHIM ,  KALTALIOGLU ERDEM

IPC: H01L20060101 ,  H01L21/44 ,  H01L21/4763 ,  H01L21/768

CPC classification number: H01L23/5226 ,  H01L21/76805 ,  H01L21/76807 ,  H01L21/76843 ,  H01L21/76852 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A multi-layer integrated circuit (400) and method of manufacturing thereof having barbed vias (427) connecting conductive lines (468, 408). Circuit (400) includes a first dielectric layer (404) deposited on a substrate (402) and conductive lines (408) formed in the first dielectric layer (404). A second dielectric layer (462) is deposited over the first dielectric layer (404). Barbed vias (427) are formed having a substantially cylindrical portion (424) within the second dielectric layer (462) and a barbed portion (426) within conductive lines (408). Conductive lines (468) are formed over the barbed vias (427) within a the second dielectric layer (462). A region of the barbed via (427) barbed portion (406) extends beneath the second dielectric layer (462).

Abstract translation: 一种多层集成电路（400）及其制造方法，其具有连接导线（468,408）的带倒钩的过孔（427）。 电路（400）包括沉积在衬底（402）上的第一介电层（404）和形成在第一介电层（404）中的导电线路（408）。 在第一介电层（404）上沉积第二介电层（462）。 带刺通孔（427）形成为在第二电介质层（462）内具有基本上圆柱形的部分（424）和在导线（408）内的有倒钩的部分（426）。 导电线（468）形成在第二电介质层（462）内的带倒钩的过孔（427）上。 倒钩通孔（427）倒钩部分（406）的区域在第二介电层（462）的下方延伸。

公开(公告)号：WO02054491A2

公开(公告)日：2002-07-11

申请号：PCT/US0143960

申请日：2001-11-14

Applicant: INFINEON TECHNOLOGIES CORP

Inventor： BARTH HANS-JOACHIM

IPC: H01L21/60 ,  H01L23/485 ,  H01L23/49 ,  H01L23/488

CPC classification number: H01L24/85 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/04042 ,  H01L2224/05006 ,  H01L2224/05073 ,  H01L2224/05546 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/45647 ,  H01L2224/48463 ,  H01L2224/48724 ,  H01L2224/48739 ,  H01L2224/48744 ,  H01L2224/48747 ,  H01L2224/48764 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48864 ,  H01L2224/84539 ,  H01L2224/84544 ,  H01L2224/84564 ,  H01L2224/85011 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85464 ,  H01L2224/85564 ,  H01L2224/85948 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/01003 ,  H01L2924/00014 ,  H01L2224/78 ,  H01L2224/48824 ,  H01L2924/00 ,  H01L2924/013 ,  H01L2924/01006

Abstract: In an integrated circuit structure, the improvement comprising a wire bonded Cu-pad with Cu-wire component, wherein the Cu-pad Cu-wire component is characterized by self-passivation, low resistance, high bond strength, and improved resistance to oxidation and corrosion, the Cu-pad Cu-wire component comprising: a metallization-line; a liner separating the metallization line and a Cu-alloysurrounding a Cu-pad; a dielectric surrounding the liner; anda Cu-pad bonded to a Cu-alloy wire; the Cu-wire component being characterized by self-passivation areas on: a) a dopant rich interface in between the Cu-alloy and liner; b) a surface of the Cu-pad; c) a surface of the bond between the Cu-pad and the Cu-alloy wire; and d) a surface of the Cu-alloy wire.

Abstract translation: 在集成电路结构中，改进包括具有铜丝成分的引线接合铜焊盘，其中Cu焊盘铜线部件的特征在于自钝化，低电阻，高粘合强度和改善的耐氧化性， Cu-铜Cu组分包括：金属化线; 分离金属化线的衬里和围绕Cu焊盘的Cu合金; 围绕衬套的电介质; 和与Cu合金线接合的铜焊盘; Cu-丝组分的特征在于自钝化区域：a）在Cu-合金和衬垫之间的富掺杂界面; b）铜焊盘的表面; c）Cu焊盘和Cu合金线之间的接合表面; 和d）Cu合金线的表面。

公开(公告)号：EP1399958A4

公开(公告)日：2010-08-25

申请号：EP02744765

申请日：2002-06-27

Applicant: IBM ,  INFINEON TECHNOLOGIES CORP

Inventor： BARTH HANS-JOACHIM ,  BURRELL LLYOD G ,  FRIESE GERALD R ,  STETTER MICHAEL

IPC: H01L21/3205 ,  H01L23/525 ,  H01L21/768 ,  H01L21/82 ,  H01L23/52 ,  H01L23/522 ,  H01L27/10

CPC classification number: H01L23/5258 ,  H01L2924/0002 ,  H01L2924/00