公开(公告)号：WO2004027801A3

公开(公告)日：2005-02-24

申请号：PCT/US0329595

申请日：2003-09-19

Applicant: IBM ,  INFINEON TECHNOLOGIES CORP

Inventor： FRIESE GERALD R ,  COWLEY ANDY ,  FAYAZ MOHAMMED F ,  MOTSIFF WILLIAM T

IPC: H01L23/525 ,  H01L21/71

CPC classification number: H01L23/5258 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The act of blowing an unpassivated electrical fuse (for example, fuse 405) using a laser can result in the splattering of the fuse material and result in electrical short circuits. A blast barrier (for example blast barrier 406) formed around an area of the fuse that is blown by the laser helps to contain the splattering of the fuse material. The blast barrier may be formed from the same material as the fuses themselves and therefore, can be created in the same fabrication step.

Abstract translation: 使用激光器吹动未激活的电熔丝（例如，熔丝405）的行为可能导致熔丝材料的飞溅并导致电气短路。 形成在由激光器熔断的熔丝区域周围形成的防爆屏障（例如鼓风屏障406）有助于容纳熔丝材料的飞溅。 防爆屏障可以由与熔丝本身相同的材料形成，因此可以在相同的制造步骤中形成。

公开(公告)号：WO0199184A3

公开(公告)日：2002-06-27

申请号：PCT/US0119881

申请日：2001-06-21

Applicant: INFINEON TECHNOLOGIES CORP

Inventor： STETTER MICHAEL ,  KALTALIOGLU ERDEM ,  COWLEY ANDY

IPC: H01L21/768 ,  H01L23/532

CPC classification number: H01L21/76811 ,  H01L21/76813 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2221/1036 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of fabricating an integrated circuit with a dual dielectric structure and utilizes a dual damascene process to fabricate metal interconnection layers. The dual dielectric structure consists of a first insulating layer (24) of conventional dielectric material, and a second insulating layer (26) of a second dielectric material with a low dielectric constant (low-k dielectric material). The first dielectric material is used in regions of the integrated circuit where the superior mechanical properties of conventional dielectric materials will result in maintaining the reliability and mechanical properties of the integrated circuit. The second dielectric material is used in regions of the integrated circuit where the low dielectric constant will result in improved speed of the integrated circuit and reduced electrical coupling between conductors in the integrated circuit. The fabrication of the dual dielectric structure is integrated with a dual damascene metallization process.

Abstract translation: 一种制造具有双电介质结构的集成电路的方法，并利用双镶嵌工艺来制造金属互连层。 双电介质结构由常规介电材料的第一绝缘层（24）和具有低介电常数（低k电介质材料）的第二介电材料的第二绝缘层（26）组成。 第一介电材料用于集成电路的区域，其中传统介电材料的优良机械性能将导致保持集成电路的可靠性和机械性能。 第二介电材料用于集成电路的区域，其中低介电常数将导致集成电路的改进的速度和减小集成电路中的导体之间的电耦合。 双电介质结构的制造与双镶嵌金属化工艺集成。

公开(公告)号：WO0207203A3

公开(公告)日：2002-05-30

申请号：PCT/US0120184

申请日：2001-06-25

Applicant: INFINEON TECHNOLOGIES CORP ,  IBM

Inventor： COWLEY ANDY ,  EMMI PETER ,  TIMOTHY DALTON ,  JAHNES CHRISTOPHER VINCENT

IPC: H01L21/311 ,  H01L21/768 ,  H01L21/3213

CPC classification number: H01L21/02063 ,  H01L21/31138 ,  H01L21/76804 ,  H01L21/76807 ,  Y10S134/902 ,  Y10S438/906

Abstract: A method for removal of post reactive ion etch by-product from a semiconductor wafer surface or microelectronic composite structure comprising:supplying a reducing gas plasma incorporating a forming gas mixture selected from the group consisting of a mixture of N2/H2 or a mixture of NH3/H2 into a vacuum chamber in which a semiconductor wafer surface or a microelectronic composite structure is supported to form a post-RIE polymer material by-product on the composite structure without significant removal of an organic, low K material which has also been exposed to the reducing gas plasma; and removing the post-RIE polymer material by-product with a wet clean.

Abstract translation: 一种用于从半导体晶片表面或微电子复合结构去除后反应离子蚀刻副产物的方法，包括：提供还原气体等离子体，该还原气体等离子体包含选自N2 / H2或NH3混合物的成形气体混合物 / H2进入真空室，其中半导体晶片表面或微电子复合结构被支撑以在复合结构上形成后RIE聚合物材料副产物，而不显着除去已经暴露于 还原气体等离子体; 并用湿清洁除去后RIE聚合物材料副产物。

公开(公告)号：AU2003278847A8

公开(公告)日：2004-04-08

申请号：AU2003278847

申请日：2003-09-19

Applicant: INFINEON TECHNOLOGIES CORP ,  IBM

Inventor： COWLEY ANDY ,  FAYAZ MOHAMMED F ,  MOTSIFF WILLIAM T ,  FRIESE GERALD R

IPC: H01L23/525

Abstract: The act of blowing an unpassivated electrical fuse (for example, fuse 405) using a laser can result in the splattering of the fuse material and result in electrical short circuits. A blast barrier (for example blast barrier 406) formed around an area of the fuse that is blown by the laser helps to contain the splattering of the fuse material. The blast barrier may be formed from the same material as the fuses themselves and therefore, can be created in the same fabrication step.

公开(公告)号：EP1547144A4

公开(公告)日：2009-01-07

申请号：EP03770364

申请日：2003-09-19

Applicant: IBM ,  INFINEON TECHNOLOGIES CORP

Inventor： FRIESE GERALD R ,  COWLEY ANDY ,  FAYAZ MOHAMMED F ,  MOTSIFF WILLIAM T

IPC: H01L23/525

CPC classification number: H01L23/5258 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The act of blowing an unpassivated electrical fuse (for example, fuse 405) using a laser can result in the splattering of the fuse material and result in electrical short circuits. A blast barrier (for example blast barrier 406) formed around an area of the fuse that is blown by the laser helps to contain the splattering of the fuse material. The blast barrier may be formed from the same material as the fuses themselves and therefore, can be created in the same fabrication step.

Abstract translation: 使用激光吹入未激活的电熔丝（例如，熔丝405）的动作可能导致熔丝材料的飞溅并导致电气短路。 形成在由激光器熔断的保险丝的区域周围形成的防爆屏障（例如鼓风屏障406）有助于容纳熔丝材料的飞溅。 防爆屏障可以由与熔丝本身相同的材料形成，因此可以在相同的制造步骤中形成。