公开(公告)号：WO02058117A3

公开(公告)日：2003-08-28

申请号：PCT/EP0201049

申请日：2002-01-16

Applicant: IBM ,  INFINEON TECHNOLOGIES CORP ,  IBM FRANCE

Inventor： ARMACOST MICHAEL D ,  AUGUSTIN ANDREAS K ,  FRIESE GERALD R ,  HEIDENREICH JOHN E III ,  HUECKEL GARY R ,  STEIN KENNETH J

IPC: H01L27/04 ,  H01L21/02 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/768 ,  H01L21/822 ,  H01L23/522

CPC classification number: H01L28/40 ,  H01L21/31116 ,  H01L21/32136 ,  H01L21/76802 ,  H01L21/76816 ,  H01L23/5223 ,  H01L28/75 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

Abstract: A parallel plate capacitor in copper technology is formed in an area that has no copper below it (within 0.3 mu ) with a bottom etch stop layer (104), a composite bottom plate (110) having an aluminium layer below a TiN layer, an oxide capacitor dielectric (120), and a top plate (130) of TiN. The process involves etching the top plate to leave a capacitor area, etching the bottom plate to a larger bottom area having a margin on all sides; depositing an interlayer dielectric having a higher material quality below the top surface of the capacitor top plate; opening contact apertures to the top and bottom plates and to lower interconnect to a two step process that partially opens a nitride cap layer on the lower interconnect and the top plate while penetrating the nitride cap layer above the bottom plate, then cutting through the capacitor dielectric and finishing the penetration of the nitride cap layer.

Abstract translation: 在铜技术中的平行平板电容器形成在其下方没有铜（0.3μm以内）的区域，底部蚀刻停止层（104），在TiN层下方具有铝层的复合底板（110）， 氧化物电容器电介质（120）和TiN的顶板（130）。 该方法包括蚀刻顶板以留下电容器区域，将底板蚀刻到具有在所有侧面上的边缘的较大底部区域; 在电容器顶板的顶表面下沉积具有较高材料质量的层间电介质; 打开接触孔到顶板和底板，并且将互连件下降到两步工艺，其在穿过底板上方的氮化物盖层之后部分地打开下互连和顶板上的氮化物盖层，然后切穿电容器电介质 并完成氮化物盖层的穿透。

公开(公告)号：WO2004027801A3

公开(公告)日：2005-02-24

申请号：PCT/US0329595

申请日：2003-09-19

Applicant: IBM ,  INFINEON TECHNOLOGIES CORP

Inventor： FRIESE GERALD R ,  COWLEY ANDY ,  FAYAZ MOHAMMED F ,  MOTSIFF WILLIAM T

IPC: H01L23/525 ,  H01L21/71

CPC classification number: H01L23/5258 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The act of blowing an unpassivated electrical fuse (for example, fuse 405) using a laser can result in the splattering of the fuse material and result in electrical short circuits. A blast barrier (for example blast barrier 406) formed around an area of the fuse that is blown by the laser helps to contain the splattering of the fuse material. The blast barrier may be formed from the same material as the fuses themselves and therefore, can be created in the same fabrication step.

Abstract translation: 使用激光器吹动未激活的电熔丝（例如，熔丝405）的行为可能导致熔丝材料的飞溅并导致电气短路。 形成在由激光器熔断的熔丝区域周围形成的防爆屏障（例如鼓风屏障406）有助于容纳熔丝材料的飞溅。 防爆屏障可以由与熔丝本身相同的材料形成，因此可以在相同的制造步骤中形成。

公开(公告)号：EP1399958A4

公开(公告)日：2010-08-25

申请号：EP02744765

申请日：2002-06-27

Applicant: IBM ,  INFINEON TECHNOLOGIES CORP

Inventor： BARTH HANS-JOACHIM ,  BURRELL LLYOD G ,  FRIESE GERALD R ,  STETTER MICHAEL

IPC: H01L21/3205 ,  H01L23/525 ,  H01L21/768 ,  H01L21/82 ,  H01L23/52 ,  H01L23/522 ,  H01L27/10

CPC classification number: H01L23/5258 ,  H01L2924/0002 ,  H01L2924/00

公开(公告)号：EP1547144A4

公开(公告)日：2009-01-07

申请号：EP03770364

申请日：2003-09-19

Applicant: IBM ,  INFINEON TECHNOLOGIES CORP

Inventor： FRIESE GERALD R ,  COWLEY ANDY ,  FAYAZ MOHAMMED F ,  MOTSIFF WILLIAM T

IPC: H01L23/525

CPC classification number: H01L23/5258 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The act of blowing an unpassivated electrical fuse (for example, fuse 405) using a laser can result in the splattering of the fuse material and result in electrical short circuits. A blast barrier (for example blast barrier 406) formed around an area of the fuse that is blown by the laser helps to contain the splattering of the fuse material. The blast barrier may be formed from the same material as the fuses themselves and therefore, can be created in the same fabrication step.

Abstract translation: 使用激光吹入未激活的电熔丝（例如，熔丝405）的动作可能导致熔丝材料的飞溅并导致电气短路。 形成在由激光器熔断的保险丝的区域周围形成的防爆屏障（例如鼓风屏障406）有助于容纳熔丝材料的飞溅。 防爆屏障可以由与熔丝本身相同的材料形成，因此可以在相同的制造步骤中形成。

公开(公告)号：AT355614T

公开(公告)日：2006-03-15

申请号：AT02718080

申请日：2002-01-16

Applicant: IBM ,  INFINEON TECHNOLOGIES CORP

Inventor： ARMACOST MICHAEL D ,  AUGUSTIN ANDREAS K ,  FRIESE GERALD R ,  HEIDENREICH JOHN E III ,  HUECKEL GARY R ,  STEIN KENNETH J

IPC: H01L27/04 ,  H01L21/02 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/768 ,  H01L21/822 ,  H01L23/522

Abstract: A parallel plate capacitor in copper technology is formed in an area that has no copper below it (within 0.3 mum) with a bottom etch stop layer, a composite bottom plate having an aluminum layer below a TiN layer, an oxide capacitor dielectric, and a top plate of TiN; in a process that involves etching the top plate to leave a capacitor area, etching the bottom plate to a larger bottom area having a margin on all sides; depositing an interlayer dielectric having a higher material quality below the top surface of the capacitor top plate; opening contact apertures to the top and bottom plates and to lower interconnect to a two step process that partially opens a nitride cap layer on the lower interconnect and the top plate while penetrating the nitride cap layer above the bottom plate, then cutting through the capacitor dielectric and finishing the penetration of the nitride cap layer.

公开(公告)号：AU2003278847A8

公开(公告)日：2004-04-08

申请号：AU2003278847

申请日：2003-09-19

Applicant: INFINEON TECHNOLOGIES CORP ,  IBM

Inventor： COWLEY ANDY ,  FAYAZ MOHAMMED F ,  MOTSIFF WILLIAM T ,  FRIESE GERALD R

IPC: H01L23/525

Abstract: The act of blowing an unpassivated electrical fuse (for example, fuse 405) using a laser can result in the splattering of the fuse material and result in electrical short circuits. A blast barrier (for example blast barrier 406) formed around an area of the fuse that is blown by the laser helps to contain the splattering of the fuse material. The blast barrier may be formed from the same material as the fuses themselves and therefore, can be created in the same fabrication step.

公开(公告)号：DE60218442T2

公开(公告)日：2007-11-15

申请号：DE60218442

申请日：2002-01-16

Applicant: INFINEON TECHNOLOGIES CORP ,  IBM

Inventor： ARMACOST MICHAEL D ,  AUGUSTIN ANDREAS K ,  FRIESE GERALD R ,  HEIDENREICH JOHN E ,  HUECKEL GARY R ,  STEIN KENNETH J

IPC: H01L21/02 ,  H01L27/04 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/768 ,  H01L21/822 ,  H01L23/522

Abstract: A parallel plate capacitor in copper technology is formed in an area that has no copper below it (within 0.3 mum) with a bottom etch stop layer, a composite bottom plate having an aluminum layer below a TiN layer, an oxide capacitor dielectric, and a top plate of TiN; in a process that involves etching the top plate to leave a capacitor area, etching the bottom plate to a larger bottom area having a margin on all sides; depositing an interlayer dielectric having a higher material quality below the top surface of the capacitor top plate; opening contact apertures to the top and bottom plates and to lower interconnect to a two step process that partially opens a nitride cap layer on the lower interconnect and the top plate while penetrating the nitride cap layer above the bottom plate, then cutting through the capacitor dielectric and finishing the penetration of the nitride cap layer.

公开(公告)号：DE60218442D1

公开(公告)日：2007-04-12

申请号：DE60218442

申请日：2002-01-16

Applicant: INFINEON TECHNOLOGIES CORP ,  IBM

Inventor： ARMACOST MICHAEL D ,  AUGUSTIN ANDREAS K ,  FRIESE GERALD R ,  HEIDENREICH JOHN E ,  HUECKEL GARY R ,  STEIN KENNETH J

IPC: H01L21/02 ,  H01L27/04 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/768 ,  H01L21/822 ,  H01L23/522

Abstract: A parallel plate capacitor in copper technology is formed in an area that has no copper below it (within 0.3 mum) with a bottom etch stop layer, a composite bottom plate having an aluminum layer below a TiN layer, an oxide capacitor dielectric, and a top plate of TiN; in a process that involves etching the top plate to leave a capacitor area, etching the bottom plate to a larger bottom area having a margin on all sides; depositing an interlayer dielectric having a higher material quality below the top surface of the capacitor top plate; opening contact apertures to the top and bottom plates and to lower interconnect to a two step process that partially opens a nitride cap layer on the lower interconnect and the top plate while penetrating the nitride cap layer above the bottom plate, then cutting through the capacitor dielectric and finishing the penetration of the nitride cap layer.

公开(公告)号：AU2003278847A1

公开(公告)日：2004-04-08

申请号：AU2003278847

申请日：2003-09-19

Applicant: IBM

Inventor： COWLEY ANDY ,  FAYAZ MOHAMMED F ,  MOTSIFF WILLIAM T ,  FRIESE GERALD R

IPC: H01L23/525

Abstract: The act of blowing an unpassivated electrical fuse (for example, fuse 405) using a laser can result in the splattering of the fuse material and result in electrical short circuits. A blast barrier (for example blast barrier 406) formed around an area of the fuse that is blown by the laser helps to contain the splattering of the fuse material. The blast barrier may be formed from the same material as the fuses themselves and therefore, can be created in the same fabrication step.