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公开(公告)号:JP2001053623A
公开(公告)日:2001-02-23
申请号:JP2000199374
申请日:2000-06-30
Applicant: INFINEON TECHNOLOGIES CORP
Inventor: KARABED RAZMIK , ASHLEY JONATHAN J , RAE JAMES WILSON
Abstract: PROBLEM TO BE SOLVED: To obtain an expansion partial response maximum likelihood method (EPRML)-channel-device capable of making a code as efficient as possible by using a specific trellis code having three-byte error error propagation on the basis of an EPRML minimum distance channel-error. SOLUTION: An encoder decoder 12 receives an input signal and performs implement execution and realization of rate information ratio 24/26-trellis trellis code having 3-byte error error propagation on the basis of an EPRML minimum distance channel-error. A precoder 14 performs precoding processing onto a coded signal from the coder 12. An expansion partial response(EPR) channel 16 is constructed so as to receive an output from the precoder 14, and a detector 18 detects an output of the channel 16. A decoder 20 is constructed so as to apply inverse processing or inverse operation to the coder 12.
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公开(公告)号:WO0180238A8
公开(公告)日:2003-06-19
申请号:PCT/US0111399
申请日:2001-04-05
Applicant: INFINEON TECHNOLOGIES CORP
Inventor: RAE JAMES WILSON , BLISS WILLIAM , ASHLEY JONATHAN , KARABED RAZMIK , FRANCK STEPHEN J , MISTLEBERGER FRITZ , DRILLER MATTHIAS , STOCKMANS HEINER , MARGRAF DOMINIK
CPC classification number: G11B20/10055 , G11B5/012 , G11B5/09 , G11B5/59688 , G11B5/6076 , G11B20/10009 , G11B20/10037
Abstract: An improved sampled amplitude read/write channel is provided. The system is an integrated Generalized Partial Response Maximum Likelihood (GPRML) read channel incorporating Read, Write, and Servo modes of operation. One implementation includes a 32/34 rate parity code and matched Viterbi detector, a 32 state Viterbi detector optimal parity processor, robust frame synchronization, self-adaptive equalization, thermal asperity detection and compensation, adaptive magneto-resistive asymmetry compensation, low latency interpolated timing recovery and programmable write precompensation.
Abstract translation: 提供了一种改进的采样幅度读/写通道。 该系统是集成了读,写和伺服操作模式的集成广义部分响应最大似然(GPRML)读通道。 一个实现包括32/34速率奇偶校验码和匹配维特比检测器,32状态维特比检测器最佳奇偶校验处理器,鲁棒帧同步,自适应均衡,热粗糙度检测和补偿,自适应磁阻不对称补偿,低延迟内插时序 恢复和可编程预写。
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公开(公告)号:SG87896A1
公开(公告)日:2002-04-16
申请号:SG200003674
申请日:2000-07-01
Applicant: INFINEON TECHNOLOGIES CORP
Inventor: KARABED RAZMIK , ASHLEY JONATHAN J , RAE JAMES WILSON
Abstract: A first trellis code (12A, 20A) according to the present invention is a rate 24/26 trellis code with three (3) bytes error propagation due to EPRML minimum distance channel errors, a minimum of six (6) transitions per code word and a maximum of twelve (12) consecutive zeroes. A second trellis code (12B, 20B) according to the present invention is a rate 48/51 trellis code, derived from the first trellis code. The second trellis code has four (4) bytes error propagation due to EPRML minimum distance channel errors, a minimum of twelve (12) transitions per code word and a maximum of twelve (12) consecutive zeroes. A third trellis code (12C, 20C) according to the present invention is a rate 48/51 trellis code with four (4) bytes error propagation due to EPRML minimum distance channel errors, a minimum of fourteen (14) transitions per code word and a maximum of eleven (11) consecutive zeroes.
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公开(公告)号:DE10344340A1
公开(公告)日:2004-06-24
申请号:DE10344340
申请日:2003-09-24
Applicant: INFINEON TECHNOLOGIES CORP
Inventor: ASHLEY JONATHAN , BLISS WILLIAM G , KARABED RAZMIK , ZHANG KAICHI
Abstract: The present invention relates to a coding system characterized by various combinations of the following properties: 1) Even parity at the output of d of the precoder; 2) A coding rate of 32/34; 3) At least 9 ones per codeword; 4) No more than 13 consecutive zeros in the stream of encoded data (G=13); 5) No more than 13 consecutive zeros in any run of every-other-bit in the stream of codewords (I=13); 6) For closed error events in y or y' having squared-distance mfb 2 in the detector, the decoder produces at most 4 corresponding erroneous data bytes; 7) Decoding of a 34 bit codeword may begin when 19 of its bits have been received; 8) If the Viterbi detector 108 outputs Non-Return to Zero (NRZ) symbols, then its output is filtered by (1⊕D^2) before being decoded, but if the Viterbi detector outputs NRZ Inverter (NRZI) symbols, then its output is decoded directly; and 9) The even parity is on NRZ symbols.
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公开(公告)号:DE10344340B4
公开(公告)日:2009-04-02
申请号:DE10344340
申请日:2003-09-24
Applicant: INFINEON TECHNOLOGIES CORP
Inventor: ASHLEY JONATHAN , BLISS WILLIAM G , KARABED RAZMIK , ZHANG KAICHI
Abstract: The present invention relates to a coding system characterized by various combinations of the following properties: 1) Even parity at the output of d of the precoder; 2) A coding rate of 32/34; 3) At least 9 ones per codeword; 4) No more than 13 consecutive zeros in the stream of encoded data (G=13); 5) No more than 13 consecutive zeros in any run of every-other-bit in the stream of codewords (I=13); 6) For closed error events in y or y' having squared-distance mfb 2 in the detector, the decoder produces at most 4 corresponding erroneous data bytes; 7) Decoding of a 34 bit codeword may begin when 19 of its bits have been received; 8) If the Viterbi detector 108 outputs Non-Return to Zero (NRZ) symbols, then its output is filtered by (1⊕D^2) before being decoded, but if the Viterbi detector outputs NRZ Inverter (NRZI) symbols, then its output is decoded directly; and 9) The even parity is on NRZ symbols.
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公开(公告)号:SG91299A1
公开(公告)日:2002-09-17
申请号:SG200005000
申请日:2000-09-01
Applicant: INFINEON TECHNOLOGIES CORP
Inventor: KARABED RAZMIK
Abstract: A survival selection rule for determining a Viterbi output. A survival selection rule according to the present invention compares paths at a plurality of endpoint states but fewer than the total number of endpoint states. Viterbi detectors using the present invention provide high performance, easier implementation, and error degradation comparable to conventional methods.
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7.
公开(公告)号:SG91298A1
公开(公告)日:2002-09-17
申请号:SG200004999
申请日:2000-09-01
Applicant: INFINEON TECHNOLOGIES CORP
Inventor: ASHLEY JONATHAN , KARABED RAZMIK
IPC: H03M13/41 , H04L25/03 , H04L25/497 , G11B5/09 , H03D1/00
Abstract: A Viterbi trellis is provided which allows for implementation of either an EPRML type channel or an E2PRML type channel (208) using a single trellis structure. According to a specific embodiment, a trellis is provided which can support a 0 mod 2 EPRML (M2EPRML) channel and a modified E2PRML (ME2PRML) channel.
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