Abstract:
A magneto-resistive asymmetry compensation system includes a linearizer interposed in a data path and a control loop. The control loop uses signal estimates from an interpolated timing response unit to derive a magneto-resistive asymmetry error. The error term is used to obtain a control scaling input to the linearizer. The linearizer functions to multiply the scaling multiple to the square of the input signal and then add it back to the input signal.
Abstract:
A magneto-resistive asymmetry compensation system includes a linearizer interposed in a data path and a control loop. The control loop uses signal estimates from an interpolated timing response unit to derive a magneto-resistive asymmetry error. The error term is used to obtain a control scaling input to the linearizer. The linearizer functions to multiply the scaling multiple to the square of the input signal and then add it back to the input signal.
Abstract:
An improved sampled amplitude read/write channel is provided. The system is an integrated Generalized Partial Response Maximum Likelihood (GPRML) read channel incorporating Read, Write, and Servo modes of operation. One implementation includes a 32/34 rate parity code and matched Viterbi detector, a 32 state Viterbi detector optimal parity processor, robust frame synchronization, self-adaptive equalization, thermal asperity detection and compensation, adaptive magneto-resistive asymmetry compensation, low latency interpolated timing recovery and programmable write precompensation.
Abstract:
A method and apparatus for removing second order distortion is disclosed. The method couples a differential load between two source followers of a gain stage. The apparatus includes a differential load having two MOS transistors of unequal channel width/length ratios. The differential load implements a square and summing function in a single circuit eliminating the need to split the signal path.
Abstract:
The system has a low pass filter (100) for a first range of signals. The filter produces a first feedback signal (208). The system includes a difference amplifier (202) which is connected with the filter (100), and which subtracts the first signal (208) from an input signal (206), to produce a high pass filtering effect. Independent claims are included for methods for filtering signals.
Abstract:
The present invention relates to a conversion circuit (200) that converts a single-ended signal to differential signals. According to an embodiment of the present invention, crosstalk is avoided by insuring that none of the transistors (214, 208, 206) in the conversion circuit (200) are directly connected to ground (210). By not having a transistor (214, 208, 206) directly connected to ground (210), ground current is avoided and crosstalk associated with ground current is eliminated.
Abstract:
The system has a low pass filter (100) for a first range of signals. The filter produces a first feedback signal (208). The system includes a difference amplifier (202) which is connected with the filter (100), and which subtracts the first signal (208) from an input signal (206), to produce a high pass filtering effect. Independent claims are included for methods for filtering signals.