RF LDMOS on partial SOI substrate
    1.
    发明申请
    RF LDMOS on partial SOI substrate 失效
    RF LDMOS在部分SOI衬底上

    公开(公告)号:US20020197774A1

    公开(公告)日:2002-12-26

    申请号:US10186528

    申请日:2002-07-01

    Abstract: In the prior art LDMOSFET devices capable of handling high power have been made by locating the source contact on the bottom surface of the device, allowing for good heat sinking, with connection to the source region being made through a sinker. However, this structure has poor high frequency characteristics. Also in the prior art, good high frequency performance has been achieved by introducing a dielectric layer immediately below the source/drain regions (SOI) but this structure has poor power handling capabilities. The present invention achieves both good high frequency behavior as well as good power capability in the same device. Instead of inserting a dielectric layer over the entire cross-section of the device, the dielectric layer is limited to being below the heavily doped section of the drain with a small amount of overlap into the lightly doped section. The structure is described in detail together with a process for manufacturing it.

    Abstract translation: 在现有技术中,能够处理高功率的LDMOSFET器件已经通过将源极接触定位在器件的底表面上,通过连接到源极区域通过沉降片而实现良好的散热。 然而,该结构具有差的高频特性。 同样在现有技术中,通过在源极/漏极区域(SOI)之下引入电介质层已经实现了良好的高频性能,但是该结构具有差的功率处理能力。 本发明在同一设备中实现了良好的高频行为以及良好的功率能力。 代替在器件的整个横截面上插入电介质层,电介质层被限制在漏极的重掺杂部分之下,在轻掺杂部分中具有少量的重叠。 详细描述该结构及其制造方法。

    Apparatus and process for bulk wet etch with leakage protection
    2.
    发明申请
    Apparatus and process for bulk wet etch with leakage protection 失效
    用于具有漏电保护的散装湿蚀刻的装置和工艺

    公开(公告)号:US20030160022A1

    公开(公告)日:2003-08-28

    申请号:US10083990

    申请日:2002-02-26

    CPC classification number: H01L21/67086 H01L21/30608 H01L21/6708

    Abstract: When using hot alkaline etchants such as KOH, the wafer front side, where various devices and/or circuits are located, must be isolated from any contact with the etchant. This has been achieved by using two chambers that are separated from each other by the wafer that is to be etched. Etching solution in one chamber is in contact with the wafer's back surface while deionized water in the other chamber contacts the front surface. The relative liquid pressures in the chambers is arranged to be slightly higher in the chamber of the front surface so that leakage of etchant through a pin hole from back surface to front surface does not occur. As a further precaution, a monitor to detect the etchant is located in the DI water so that, if need be, etching can be terminated before irreparable damage is done.

    Abstract translation: 当使用诸如KOH的热碱性蚀刻剂时,其中各种装置和/或电路所在的晶片正面必须与与蚀刻剂的任何接触隔离。 这是通过使用被待蚀刻的晶片彼此分离的两个室来实现的。 一个室中的蚀刻溶液与晶片的背面接触,而另一个室中的去离子水接触前表面。 腔室中的相对液体压力被布置为在前表面的腔室中略高,使得蚀刻剂不会通过针孔从背表面泄漏到前表面。 作为进一步的预防措施,用于检测蚀刻剂的监测器位于去离子水中,使得如果需要,可以在不可修复的损伤完成之前终止蚀刻。

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