SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SAME
    1.
    发明申请
    SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SAME 有权
    半导体结构及其制造方法

    公开(公告)号:US20150332973A1

    公开(公告)日:2015-11-19

    申请号:US14652956

    申请日:2013-07-26

    Abstract: The present invention provides a method for manufacturing a semiconductor structure, which comprises: a) forming gate lines extending in a direction on a substrate; b) forming a photoresist layer that covers the semiconductor structure; patterning the photoresist layer to form openings across the gate lines; c) narrowing the openings by forming a self-assembly copolymer inside the openings; and d) cutting the gate lines via the openings to make the gate lines insulated at the openings. Through forming an additional layer on the inner wall of the openings of the photoresist layer, the method for manufacturing a semiconductor structure provided by the present invention manages to reduce the distance between the two opposite walls of the openings in the direction of gate width, namely, the method manages to reduce the distance between the ends of electrically isolated gates located on the same line where it is unnecessary to manufacture a cut mask whose lines are extremely fine. Working area is therefore saved, which accordingly improves integration level of semiconductor devices. In addition, the present invention further provides a semiconductor structure according to the method provided by the present invention.

    Abstract translation: 本发明提供一种制造半导体结构的方法,其包括:a)形成沿衬底方向延伸的栅极线; b)形成覆盖半导体结构的光致抗蚀剂层; 图案化光致抗蚀剂层以在栅极线上形成开口; c)通过在开口内形成自组装共聚物来缩小开口; 以及d)经由所述开口切割所述栅极线以使所述栅极线在所述开口处绝缘。 通过在光致抗蚀剂层的开口的内壁上形成附加层,本发明提供的半导体结构的制造方法旨在减小开口方向的两个相对壁之间在栅极宽度方向上的距离,即 该方法旨在减少位于同一线路上的电隔离门的端部之间的距离,其中不需要制造线极细的切割掩模。 因此节省了工作区域,从而提高了半导体器件的集成度。 此外,本发明还提供根据本发明提供的方法的半导体结构。

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