METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
    1.
    发明申请
    METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
    制造半导体器件的方法

    公开(公告)号:US20150214332A1

    公开(公告)日:2015-07-30

    申请号:US14426690

    申请日:2012-11-13

    Abstract: A method for manufacturing a dummy gate structure. The method may include: forming a dummy gate oxide layer and a dummy gate material layer on a semiconductor substrate sequentially; forming an ONO structure on the dummy gate material layer; forming a top amorphous silicon layer on the ONO structure; forming a patterned photoresist layer on the top amorphous silicon layer; etching the top amorphous silicon layer with the patterned photoresist layer as a mask, the etching being stopped on the ONO structure; etching the ONO structure with the patterned photoresist layer and a remaining portion of the top amorphous silicon layer as a mask, the etching being stopped on the dummy gate material layer; removing the patterned photoresist layer; and etching the dummy gate material layer, the etching being stopped at the dummy gate oxide layer to form a dummy gate structure.

    Abstract translation: 一种用于制造虚拟栅极结构的方法。 该方法可以包括:顺序地在半导体衬底上形成伪栅极氧化物层和虚拟栅极材料层; 在虚拟栅极材料层上形成ONO结构; 在ONO结构上形成顶部非晶硅层; 在顶部非晶硅层上形成图案化的光致抗蚀剂层; 用图案化的光致抗蚀剂层作为掩模蚀刻顶部非晶硅层,蚀刻停止在ONO结构上; 用图案化的光致抗蚀剂层和顶部非晶硅层的剩余部分作为掩模蚀刻ONO结构,蚀刻停止在虚拟栅极材料层上; 去除图案化的光致抗蚀剂层; 并且蚀刻伪栅极材料层,蚀刻停止在虚设栅极氧化层处以形成虚拟栅极结构。

    Method for making HKMG dummy gate structure with amorphous/ONO masking structure and procedure
    2.
    发明授权
    Method for making HKMG dummy gate structure with amorphous/ONO masking structure and procedure 有权
    具有非晶/ ONO掩模结构和程序的HKMG虚拟栅极结构的方法

    公开(公告)号:US09331172B2

    公开(公告)日:2016-05-03

    申请号:US14426690

    申请日:2012-11-13

    Abstract: A method for manufacturing a dummy gate structure. The method may include: forming a dummy gate oxide layer and a dummy gate material layer on a semiconductor substrate sequentially; forming an ONO structure on the dummy gate material layer; forming a top amorphous silicon layer on the ONO structure; forming a patterned photoresist layer on the top amorphous silicon layer; etching the top amorphous silicon layer with the patterned photoresist layer as a mask, the etching being stopped on the ONO structure; etching the ONO structure with the patterned photoresist layer and a remaining portion of the top amorphous silicon layer as a mask, the etching being stopped on the dummy gate material layer; removing the patterned photoresist layer; and etching the dummy gate material layer, the etching being stopped at the dummy gate oxide layer to form a dummy gate structure.

    Abstract translation: 一种用于制造虚拟栅极结构的方法。 该方法可以包括:顺序地在半导体衬底上形成伪栅极氧化物层和虚拟栅极材料层; 在虚拟栅极材料层上形成ONO结构; 在ONO结构上形成顶部非晶硅层; 在顶部非晶硅层上形成图案化的光致抗蚀剂层; 用图案化的光致抗蚀剂层作为掩模蚀刻顶部非晶硅层,蚀刻停止在ONO结构上; 用图案化的光致抗蚀剂层和顶部非晶硅层的剩余部分作为掩模蚀刻ONO结构,蚀刻停止在虚拟栅极材料层上; 去除图案化的光致抗蚀剂层; 并且蚀刻伪栅极材料层,蚀刻停止在虚设栅极氧化层处以形成虚拟栅极结构。

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