公开(公告)号：US20250133773A1

公开(公告)日：2025-04-24

申请号：US18915723

申请日：2024-10-15

Applicant: INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES

Inventor： Qingzhu ZHANG ,  Lianlian LI ,  Anyan DU ,  Huaxiang YIN ,  Lei CAO ,  Jiaxin YAO ,  Zhaohao ZHANG ,  Qingkun LI ,  Guanqiao SANG

IPC: H01L29/423 ,  H01L21/822 ,  H01L27/06 ,  H01L27/092 ,  H01L29/06 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

Abstract: The present disclosure relates to a stacked nanosheet gate-all-around device with an air spacer and a method of manufacturing a stacked nanosheet gate-all-around device with an air spacer. The stacked nanosheet gate-all-around device with the air spacer includes: a substrate with a shallow trench isolation structure on a surface of the substrate; a nanosheet stacking portion provided above the substrate, where the nanosheet stacking portion includes a stack formed by a plurality of nanosheets, and the stack formed by the nanosheets constitutes a plurality of conductive channels; a gate-all-around surrounding the nanosheet stacking portion; and a source/drain region located on two opposite sides of the nanosheet stacking portion, where an empty spacer is provided between the source/drain region and the gate-all-around, where an interior of the empty spacer is filled with at least one of air, a reducing gas, or an inert gas.

公开(公告)号：US20250133785A1

公开(公告)日：2025-04-24

申请号：US18907334

申请日：2024-10-04

Applicant: Institute of Microelectronics, Chinese Academy of Sciences

Inventor： Qingzhu ZHANG ,  Lianlian LI ,  Anyan DU ,  Huaxiang YIN ,  Lei CAO ,  Jiaxin YAO ,  Zhaohao ZHANG ,  Qingkun LI ,  Guanqiao SANG

IPC: H01L29/06 ,  H01L29/10 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

Abstract: The present disclosure provides a stacked nanosheet gate-all-around device with an air spacer and a manufacturing method. The device includes: a substrate, where a first dielectric layer is on the substrate, a gap array is in the first dielectric layer, the gap array includes multiple gap units, and each gap unit is in a fin shape above the substrate; a nanosheet stacking portion above the gap unit, including a stack formed by multiple nanosheets, and the stack formed by the nanosheets constitutes multiple conductive channels; a gate-all-around surrounding the nanosheet stacking portion; and a source/drain region on two opposite sides of the nanosheet stacking portion, where an empty spacer is between the source/drain region and the gate-all-around. An interior of the gap array and an interior of the empty spacer are filled with at least one of air, a reducing gas, or an inert gas.