-
公开(公告)号:US11215652B2
公开(公告)日:2022-01-04
申请号:US16065582
申请日:2015-12-25
Inventor: Guangwei Xu , Zhiheng Han , Wei Wang , Congyan Lu , Lingfei Wang , Ling Li , Ming Liu
Abstract: A method for obtaining a contact resistance of a planar device includes: obtaining a contact resistance of a planar device by using a potential measurement method, in the measurement of the surface potential distribution, the planar device is in a state of current flowing, a certain voltage drop is formed at a junction area of the device; extracting the voltage drop measured through the Kelvin microscope by using a linear fitting method; and dividing the measured voltage drop by the current flowing through the device, thereby accurately calculating the magnitude of the contact resistance at the junction area of the planar device. With the present invention, the contact resistance of the planar device can be precisely measured, which is suitable for the contact resistance measurement experiments of devices such as thin film transistors and diodes. The invention has the advantages of reasonable theory, accurate result, simple and easy operation, and is favorable for optimizing the device performance and establishing a complete electrical model of the device.
-
公开(公告)号:US11189345B2
公开(公告)日:2021-11-30
申请号:US16959225
申请日:2018-01-22
Inventor: Qi Liu , Wei Wang , Sen Liu , Feng Zhang , Hangbing Lv , Shibing Long , Ming Liu
Abstract: An operation method for integrating logic calculations and data storage based on a crossbar array structure of resistive switching devices. The calculation and storage functions of the method are based on the same hardware architecture, and the data storage is completed while performing calculation, thereby realizing the fusion of calculation and storage. The method includes applying a pulse sequence to a specified word line or bit line by a controller, configuring basic units of resistive switching devices to form different serial-parallel structures, such that three basic logic operations, i.e. NAND, OR, and COPY, are implemented and mutually combined on this basis, thereby implementing 16 types of binary Boolean logic and full addition operations, and on this basis, a method for implementing a parallel logic and full addition operations is provided.
-