公开(公告)号：US20210125873A1

公开(公告)日：2021-04-29

申请号：US16924057

申请日：2020-07-08

Applicant: INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES

Inventor： Yongliang LI ,  Hong YANG ,  Xiahong CHENG ,  Xiaolei WANG ,  Xueli MA ,  Wenwu WANG

IPC: H01L21/8234 ,  H01L29/66 ,  H01L29/775 ,  H01L29/78 ,  H01L21/308 ,  H01L29/06 ,  H01L29/165 ,  H01L29/51 ,  H01L21/02

Abstract: The disclosure provides a method for fabricating a semiconductor device, in which a core device of the semiconductor device employs a stacked nanowires or nanosheets structure, and an input/output device of the semiconductor device employs FinFET structure. The disclosure also provides a FinFET with an input/output device compatible with the stacked nanowires or nanosheets. The solution of the disclosure solves the problem that if the input/output device employs stacked nanowires or nanosheets device, it is difficult to fill a metal gate between two nanowires or nanosheets due to the thicker dielectric layer, and even if the metal gate is filled partially, the electrical performance of the input/output device is still poor.