公开(公告)号：DE69924039T2

公开(公告)日：2006-04-13

申请号：DE69924039

申请日：1999-12-21

Applicant: INTEL CORP

Inventor： CLOHSET J ,  DIEP A ,  GANDHI WISHWESH ,  PIAZZA A ,  SREENIVAS ADITYA ,  TRIEU P

IPC: G06F12/00 ,  G06F13/18 ,  G06F12/02 ,  G06F13/362

Abstract: According to one embodiment, a computer system is disclosed that includes a memory and a memory controller coupled to the memory. The memory controller includes an arbitration unit that may be programmed to operate according to a first arbitration mode or a second arbitration mode. The computer system also includes a first device and a second device coupled to the arbitration unit. According to a further embodiment, the first device is assigned a higher priority classification than the second device for accessing the memory while the arbitration unit is operating according to the first arbitration mode. In addition, the first device and the second device are assigned equal priority classifications for accessing the memory while the arbitration unit is operating according to the second arbitration mode.

公开(公告)号：DE69924039D1

公开(公告)日：2005-04-07

申请号：DE69924039

申请日：1999-12-21

Applicant: INTEL CORP

Inventor： CLOHSET J ,  DIEP A ,  GANDHI WISHWESH ,  PIAZZA A ,  SREENIVAS ADITYA ,  TRIEU P

IPC: G06F12/00 ,  G06F12/02 ,  G06F13/18 ,  G06F13/362

Abstract: According to one embodiment, a computer system is disclosed that includes a memory and a memory controller coupled to the memory. The memory controller includes an arbitration unit that may be programmed to operate according to a first arbitration mode or a second arbitration mode. The computer system also includes a first device and a second device coupled to the arbitration unit. According to a further embodiment, the first device is assigned a higher priority classification than the second device for accessing the memory while the arbitration unit is operating according to the first arbitration mode. In addition, the first device and the second device are assigned equal priority classifications for accessing the memory while the arbitration unit is operating according to the second arbitration mode.