公开(公告)号：WO0041083A3

公开(公告)日：2002-05-16

申请号：PCT/US9930719

申请日：1999-12-21

Applicant: INTEL CORP ,  CLOHSET STEVE J ,  DIEP TRUNG A ,  GANDHI WISHWESH ,  PIAZZA THOMAS A ,  SREENIVAS ADITYA ,  TRIEU TUONG P

Inventor： CLOHSET STEVE J ,  DIEP TRUNG A ,  GANDHI WISHWESH ,  PIAZZA THOMAS A ,  SREENIVAS ADITYA ,  TRIEU TUONG P

IPC: G06F12/00 ,  G06F12/02 ,  G06F13/18 ,  G06F13/362

CPC classification number: G06F13/18

Abstract: According to one embodiment, a computer system is disclosed that includes a memory and a memory controller coupled to the memory. The memory controller includes an arbitration unit that may be programmed to operate according to a first arbitration mode or a second arbitration mode. The computer system also includes a first device and a second device coupled to the arbitration unit. According to a further embodiment, the first device is assigned a higher priority classification than the second device for accessing the memory while the arbitration unit is operating according to the first arbitration mode. In addition, the first device and the second device are assigned equal priority classifications for accessing the memory while the arbitration unit is operating according to the second arbitration mode.

Abstract translation: 根据一个实施例，公开了一种包括存储器和耦合到存储器的存储器控​​制器的计算机系统。 存储器控制器包括可被编程为根据第一仲裁模式或第二仲裁模式进行操作的仲裁单元。 计算机系统还包括耦合到仲裁单元的第一设备和第二设备。 根据另一实施例，当仲裁单元根据第一仲裁模式操作时，第一设备被分配比用于访问存储器的第二设备更高的优先级分类。 此外，当仲裁单元根据第二仲裁模式操作时，第一设备和第二设备被分配用于访问存储器的相同的优先级分类。

公开(公告)号：AU2593400A

公开(公告)日：2000-07-24

申请号：AU2593400

申请日：1999-12-21

Applicant: INTEL CORP

Inventor： CLOHSET STEVE J ,  DIEP TRUNG A ,  GANDHI WISHWESH ,  PIAZZA THOMAS A ,  SREENIVAS ADITYA ,  TRIEU TUONG P

IPC: G06F12/00 ,  G06F12/02 ,  G06F13/18 ,  G06F13/362

Abstract: According to one embodiment, a computer system is disclosed that includes a memory and a memory controller coupled to the memory. The memory controller includes an arbitration unit that may be programmed to operate according to a first arbitration mode or a second arbitration mode. The computer system also includes a first device and a second device coupled to the arbitration unit. According to a further embodiment, the first device is assigned a higher priority classification than the second device for accessing the memory while the arbitration unit is operating according to the first arbitration mode. In addition, the first device and the second device are assigned equal priority classifications for accessing the memory while the arbitration unit is operating according to the second arbitration mode.

公开(公告)号：DE69924039D1

公开(公告)日：2005-04-07

申请号：DE69924039

申请日：1999-12-21

Applicant: INTEL CORP

Inventor： CLOHSET J ,  DIEP A ,  GANDHI WISHWESH ,  PIAZZA A ,  SREENIVAS ADITYA ,  TRIEU P

IPC: G06F12/00 ,  G06F12/02 ,  G06F13/18 ,  G06F13/362

Abstract: According to one embodiment, a computer system is disclosed that includes a memory and a memory controller coupled to the memory. The memory controller includes an arbitration unit that may be programmed to operate according to a first arbitration mode or a second arbitration mode. The computer system also includes a first device and a second device coupled to the arbitration unit. According to a further embodiment, the first device is assigned a higher priority classification than the second device for accessing the memory while the arbitration unit is operating according to the first arbitration mode. In addition, the first device and the second device are assigned equal priority classifications for accessing the memory while the arbitration unit is operating according to the second arbitration mode.

公开(公告)号：DE69924039T2

公开(公告)日：2006-04-13

申请号：DE69924039

申请日：1999-12-21

Applicant: INTEL CORP

Inventor： CLOHSET J ,  DIEP A ,  GANDHI WISHWESH ,  PIAZZA A ,  SREENIVAS ADITYA ,  TRIEU P

IPC: G06F12/00 ,  G06F13/18 ,  G06F12/02 ,  G06F13/362

Abstract: According to one embodiment, a computer system is disclosed that includes a memory and a memory controller coupled to the memory. The memory controller includes an arbitration unit that may be programmed to operate according to a first arbitration mode or a second arbitration mode. The computer system also includes a first device and a second device coupled to the arbitration unit. According to a further embodiment, the first device is assigned a higher priority classification than the second device for accessing the memory while the arbitration unit is operating according to the first arbitration mode. In addition, the first device and the second device are assigned equal priority classifications for accessing the memory while the arbitration unit is operating according to the second arbitration mode.

公开(公告)号：HK1044838A1

公开(公告)日：2002-11-01

申请号：HK02106466

申请日：2002-09-02

Applicant: INTEL CORP

Inventor： CLOHSET STEVE J ,  DIEP TRUNG A ,  GANDHI WISHWESH ,  PIAZZA THOMAS A ,  SREENIVAS ADITYA ,  TRIEU TUONG P

IPC: G06F12/00 ,  G06F12/02 ,  G06F13/18 ,  G06F13/362 ,  G06F

Abstract: According to one embodiment, a computer system is disclosed that includes a memory and a memory controller coupled to the memory. The memory controller includes an arbitration unit that may be programmed to operate according to a first arbitration mode or a second arbitration mode. The computer system also includes a first device and a second device coupled to the arbitration unit. According to a further embodiment, the first device is assigned a higher priority classification than the second device for accessing the memory while the arbitration unit is operating according to the first arbitration mode. In addition, the first device and the second device are assigned equal priority classifications for accessing the memory while the arbitration unit is operating according to the second arbitration mode.