公开(公告)号：AT441940T

公开(公告)日：2009-09-15

申请号：AT01944544

申请日：2001-06-14

Applicant: INTEL CORP

Inventor： VRTIS JOAN ,  FIGUEROA DAVID ,  KOHMURA TOSHIMI ,  WALK MICHAEL ,  HALE AARON

IPC: H01L23/498 ,  H01L23/50 ,  H01L23/64

Abstract: An electronic package (302, FIG. 3) includes one or more capacitors (308) embedded within one or more layers (310) of the package. The embedded capacitors are discrete devices, such as integrated circuit capacitors (FIGS. 17-18) or ceramic capacitors. During the package build-up process, the capacitors are mounted (410, FIG. 4) to a package layer, and a non-conductive layer is applied (412) over the capacitors. When the build-up process is completed, the capacitor's terminals (604, 608, FIG. 6) are electrically connected to the top surface of the package. The embedded capacitor structure can be used in an integrated circuit package (1904, FIG. 19), an interposer (1906), and/or a printed circuit board (1908).

公开(公告)号：WO0203463A3

公开(公告)日：2003-09-04

申请号：PCT/US0119225

申请日：2001-06-14

Applicant: INTEL CORP ,  VRTIS JOAN ,  FIGUEROA DAVID ,  KOHMURA TOSHIMI ,  WALK MICHAEL ,  HALE AARON

Inventor： VRTIS JOAN ,  FIGUEROA DAVID ,  KOHMURA TOSHIMI ,  WALK MICHAEL ,  HALE AARON

IPC: H01L23/498 ,  H01L23/50 ,  H01L23/64

CPC classification number: H01L23/50 ,  H01L23/49822 ,  H01L23/642 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/04941 ,  H01L2924/10253 ,  H01L2924/15311 ,  Y10T29/4913 ,  H01L2924/00 ,  H01L2224/0401

Abstract: An electronic package (302, Figure 3) includes one or more capacitors (308) embedded within one or more layers (310) of the package. The embedded capacitors are discrete devices, such as integrated circuit capacitors (Figures 17-18) or ceramic capacitors. During the package build-up process, the capacitors are mounted (410, Figure 4) to a package layer, and a non-conductive layer is applied (412) over the capacitors. When the build-up process is completed, the capacitor's terminals (604, 608, Figure 6) are electrically connected to the top surface of the package. The embedded capacitor structure can be used in an integrated circuit package (1904, Figure 19), an interposer (1906), and/or a printed circuit board (1908).

Abstract translation: 电子封装（302，图3）包括嵌入在封装的一个或多个层（310）内的一个或多个电容器（308）。 嵌入式电容器是分立器件，如集成电路电容器（图17-18）或陶瓷电容器。 在封装堆积过程中，将电容器（410，图4）安装到封装层，并且在电容器上施加非导电层（412）。 当积聚过程完成时，电容器的端子（604,608，图6）电连接到封装的顶表面。 嵌入式电容器结构可以用于集成电路封装（1904，图19），插入器（1906）和/或印刷电路板（1908）中。

公开(公告)号：DE60139809D1

公开(公告)日：2009-10-15

申请号：DE60139809

申请日：2001-06-14

Applicant: INTEL CORP

Inventor： VRTIS JOAN ,  FIGUEROA DAVID ,  KOHMURA TOSHIMI ,  WALK MICHAEL ,  HALE AARON

IPC: H01L23/498 ,  H01L23/50 ,  H01L23/64

Abstract: An electronic package (302, FIG. 3) includes one or more capacitors (308) embedded within one or more layers (310) of the package. The embedded capacitors are discrete devices, such as integrated circuit capacitors (FIGS. 17-18) or ceramic capacitors. During the package build-up process, the capacitors are mounted (410, FIG. 4) to a package layer, and a non-conductive layer is applied (412) over the capacitors. When the build-up process is completed, the capacitor's terminals (604, 608, FIG. 6) are electrically connected to the top surface of the package. The embedded capacitor structure can be used in an integrated circuit package (1904, FIG. 19), an interposer (1906), and/or a printed circuit board (1908).

公开(公告)号：HK1058433A1

公开(公告)日：2004-05-14

申请号：HK04101090

申请日：2004-02-16

Applicant: INTEL CORP

Inventor： VRTIS JOAN ,  FIGUEROA DAVID ,  KOHMURA TOSHIMI ,  WALK MICHAEL ,  HALE AARON

IPC: H01L20090101 ,  H01L23/498 ,  H01L23/50 ,  H01L23/64

Abstract: An electronic package (302, FIG. 3) includes one or more capacitors (308) embedded within one or more layers (310) of the package. The embedded capacitors are discrete devices, such as integrated circuit capacitors (FIGS. 17-18) or ceramic capacitors. During the package build-up process, the capacitors are mounted (410, FIG. 4) to a package layer, and a non-conductive layer is applied (412) over the capacitors. When the build-up process is completed, the capacitor's terminals (604, 608, FIG. 6) are electrically connected to the top surface of the package. The embedded capacitor structure can be used in an integrated circuit package (1904, FIG. 19), an interposer (1906), and/or a printed circuit board (1908).

公开(公告)号：AU6694401A

公开(公告)日：2002-01-14

申请号：AU6694401

申请日：2001-06-14

Applicant: INTEL CORP

Inventor： VRTIS JOAN ,  FIGUEROA DAVID ,  KOHMURA TOSHIMI ,  WALK MICHAEL ,  HALE AARON

IPC: H01L23/498 ,  H01L23/50 ,  H01L23/64

Abstract: An electronic package (302, FIG. 3) includes one or more capacitors (308) embedded within one or more layers (310) of the package. The embedded capacitors are discrete devices, such as integrated circuit capacitors (FIGS. 17-18) or ceramic capacitors. During the package build-up process, the capacitors are mounted (410, FIG. 4) to a package layer, and a non-conductive layer is applied (412) over the capacitors. When the build-up process is completed, the capacitor's terminals (604, 608, FIG. 6) are electrically connected to the top surface of the package. The embedded capacitor structure can be used in an integrated circuit package (1904, FIG. 19), an interposer (1906), and/or a printed circuit board (1908).