公开(公告)号：GB2423171B

公开(公告)日：2007-07-25

申请号：GB0608721

申请日：2004-12-22

Applicant: INTEL CORP

Inventor： RENAUD LYONEL ,  PUFFER DAVID M ,  KOTHAMREDDY SARATH ,  SCHMIDT DAREN J ,  MITBANDER SUNEEL G

IPC: G06F13/38 ,  H04L12/56 ,  H04L25/14

Abstract: Multiple symbol sequences that have been transmitted in parallel using the same transmit clock over a serial point to point link are received. Each symbol sequence includes an instance of a first, non-data symbol. The multiple symbol sequences are buffered and the number of times an instance of a second, non-data symbol that occurs in one of the symbol sequences is changed. A first deskew process is performed, followed by a second deskew process. The first deskew process aligns an instance of the first non-data symbol in every one of the buffered symbol sequences. The second deskew process equalizes the number of instances of the second non-data symbol that follow an instance of the first non-data symbol in every one of the symbol sequences. Other embodiments are also described and claimed.

公开(公告)号：WO2005066765A2

公开(公告)日：2005-07-21

申请号：PCT/US2004043418

申请日：2004-12-23

Applicant: INTEL CORP ,  PUFFER DAVID M ,  MITBANDER SUNEEL G ,  KOTAMREDDY SARATH K

Inventor： PUFFER DAVID M ,  MITBANDER SUNEEL G ,  KOTAMREDDY SARATH K

IPC: G06F1/32 ,  G06F9/00

CPC classification number: G06F1/3253 ,  G06F1/3203 ,  Y02D10/151

Abstract: A transmitting device and a receiving device are coupled together via an interconnect. An electrical idle ordered set is received at the receiving device power management unit after having been transmitted by the transmitting device and received at the input pins of the receiving device and moving through the receiver logic pipeline. At the time the electrical idle ordered set has been recognized at the end of the receiver logic pipeline, the power management unit checks for activity on the interconnect.. If there is no activity on the interconnect, then the power management unit causes the receiving device to enter a low power state where the receiver circuitry (input buffers) is turned off. If there is activity on the interconnect when the electrical idle ordered set is received at the power management unit, then the power management unit does not cause the receiver circuitry to be tuned off.

Abstract translation: 发射设备和接收设备经由互连耦合在一起。 在接收设备功率管理单元已经由发送设备发送并且在接收设备的输入引脚处接收并且通过接收机逻辑流水线移动之后，接收电空闲有序集合。 当在接收器逻辑流水线的末端已经识别到电空闲有序集时，电源管理单元检查互连上的活动。如果互连上没有活动，则电源管理单元使接收设备 进入接收器电路（输入缓冲器）关闭的低功率状态。 如果在电源管理单元接收到电空闲命令集时互连上有活动，则电源管理单元不会使接收器电路关闭。

公开(公告)号：DE602004011828D1

公开(公告)日：2008-03-27

申请号：DE602004011828

申请日：2004-12-23

Applicant: INTEL CORP

Inventor： RENAUD LYONEL ,  PUFFER DAVID M ,  KOTAMREDDY SARATH ,  MITBANDER SUNEEL G

IPC: G06F13/38 ,  H04L7/04

公开(公告)号：GB2423171A

公开(公告)日：2006-08-16

申请号：GB0608721

申请日：2004-12-22

Applicant: INTEL CORP

Inventor： RENAUD LYONEL ,  PUFFER DAVID M ,  KOTHAMREDDY SARATH ,  SCHMIDT DAREN J ,  MITBANDER SUNEEL G

IPC: G06F13/38 ,  H04L12/56 ,  H04L25/14

Abstract: Multiple symbol sequences that have been transmitted in parallel using the same transmit clock over a serial point to point link are received. Each symbol sequence includes an instance of a first, non-data symbol. The multiple symbol sequences are buffered and the number of times an instance of a second, non-data symbol that occurs in one of the symbol sequences is changed. A first deskew process is performed, followed by a second deskew process. The first deskew process aligns an instance of the first non-data symbol in every one of the buffered symbol sequences. The second deskew process equalizes the number of instances of the second non-data symbol that follow an instance of the first non-data symbol in every one of the symbol sequences. Other embodiments are also described and claimed.

公开(公告)号：DE602004011828T2

公开(公告)日：2009-02-12

申请号：DE602004011828

申请日：2004-12-23

Applicant: INTEL CORP

Inventor： RENAUD LYONEL ,  PUFFER DAVID M ,  KOTAMREDDY SARATH ,  MITBANDER SUNEEL G

IPC: G06F13/38 ,  H04L7/04

公开(公告)号：DE112004002567T5

公开(公告)日：2006-12-14

申请号：DE112004002567

申请日：2004-12-22

Applicant: INTEL CORP

Inventor： RENAUD LYONEL ,  PUFFER DAVID M ,  KOTAMREDDY SARATH ,  SCHMIDT DAREN J ,  MITBANDER SUNEEL G

IPC: G06F13/38 ,  H04L12/56 ,  H04L25/14

Abstract: Multiple symbol sequences that have been transmitted in parallel using the same transmit clock over a serial point to point link are received. Each symbol sequence includes an instance of a first, non-data symbol. The multiple symbol sequences are buffered and the number of times an instance of a second, non-data symbol that occurs in one of the symbol sequences is changed. A first deskew process is performed, followed by a second deskew process. The first deskew process aligns an instance of the first non-data symbol in every one of the buffered symbol sequences. The second deskew process equalizes the number of instances of the second non-data symbol that follow an instance of the first non-data symbol in every one of the symbol sequences. Other embodiments are also described and claimed.