公开(公告)号：WO2010036676A3

公开(公告)日：2010-07-22

申请号：PCT/US2009057968

申请日：2009-09-23

Applicant: INTEL CORP ,  GANESAN SANKA ,  AYGUN KEMAL ,  RAMASWAMY CHANDRASHEKHAR ,  PALMER ERIC ,  BRAUNISCH HENNING

Inventor： GANESAN SANKA ,  AYGUN KEMAL ,  RAMASWAMY CHANDRASHEKHAR ,  PALMER ERIC ,  BRAUNISCH HENNING

IPC: H01L23/48 ,  H01L23/488

CPC classification number: H01L23/34 ,  H01L23/367 ,  H01L23/498 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/50 ,  H01L23/66 ,  H01L2223/6627 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/15192 ,  H01L2924/19032 ,  H01L2224/0401

Abstract: A high-speed I/O trace is part of an I/O package architecture for an integrated circuit package substrate. The integrated circuit package substrate includes an integrated heat spreader footprint on a die-side and the I/O trace to couple with an IC device to be disposed inside the IHS footprint. The I/O trace includes a pin-out terminal outside the IHS footprint to couple to an IC device to be disposed outside the IHS footprint. The high-speed I/O trace can sustain a data flow rate from a processor in a range from 5 gigabits per second (Gb/s) to 40 Gb/s.

Abstract translation: 高速I / O走线是集成电路封装基板的I / O封装体系结构的一部分。 集成电路封装衬底包括在管芯侧上的集成散热器覆盖区和I / O迹线，以与IC器件耦合以设置在IHS覆盖区内。 I / O走线包括一个位于IHS占位面积之外的引出端子，用于耦合IC设备以放置在IHS占用面积之外。 高速I / O跟踪可以支持从每秒5千兆位（Gb / s）到40 Gb / s范围内的处理器的数据流速。

公开(公告)号：GB2476016A

公开(公告)日：2011-06-08

申请号：GB201104984

申请日：2009-09-23

Applicant: INTEL CORP

Inventor： GANESAN SANKA ,  AYGUN KEMAL ,  RAMASWAMY CHANDRASHEKHAR ,  PALMER ERIC ,  BRAUNISCH HENNING

IPC: H01L23/48 ,  H01L23/367 ,  H01L23/498

Abstract: A high-speed I/O trace is part of an I/O package architecture for an integrated circuit package substrate. The integrated circuit package substrate includes an integrated heat spreader footprint on a die-side and the I/O trace to couple with an IC device to be disposed inside the IHS footprint. The I/O trace includes a pin-out terminal outside the IHS footprint to couple to an IC device to be disposed outside the IHS footprint. The high-speed I/O trace can sustain a data flow rate from a processor in a range from 5 gigabits per second (Gb/s) to 40 Gb/s.

公开(公告)号：GB2476016B

公开(公告)日：2013-01-09

申请号：GB201104984

申请日：2009-09-23

Applicant: INTEL CORP

Inventor： GANESAN SANKA ,  AYGUN KEMAL ,  RAMASWAMY CHANDRASHEKHAR ,  PALMER ERIC ,  BRAUNISCH HENNING

IPC: H01L23/48 ,  H01L23/367 ,  H01L23/498

Abstract: A high-speed I/O trace is part of an I/O package architecture for an integrated circuit package substrate. The integrated circuit package substrate includes an integrated heat spreader footprint on a die-side and the I/O trace to couple with an IC device to be disposed inside the IHS footprint. The I/O trace includes a pin-out terminal outside the IHS footprint to couple to an IC device to be disposed outside the IHS footprint. The high-speed I/O trace can sustain a data flow rate from a processor in a range from 5 gigabits per second (Gb/s) to 40 Gb/s.

公开(公告)号：GB2488684B

公开(公告)日：2013-04-10

申请号：GB201207521

申请日：2012-04-30

Applicant: INTEL CORP

Inventor： GANESAN SANKA ,  AYGUN KEMAL ,  RAMASWAMY CHANDRASHEKHAR ,  PALMER ERIC ,  BRAUNISCH HENNING

IPC: H01L23/48 ,  H01L23/367 ,  H01L23/498

Abstract: A high-speed I/O trace is part of an I/O package architecture for an integrated circuit package substrate. The integrated circuit package substrate includes an integrated heat spreader footprint on a die-side and the I/O trace to couple with an IC device to be disposed inside the IHS footprint. The I/O trace includes a pin-out terminal outside the IHS footprint to couple to an IC device to be disposed outside the IHS footprint. The high-speed I/O trace can sustain a data flow rate from a processor in a range from 5 gigabits per second (Gb/s) to 40 Gb/s.

公开(公告)号：GB2488684A

公开(公告)日：2012-09-05

申请号：GB201207521

申请日：2012-04-30

Applicant: INTEL CORP

Inventor： GANESAN SANKA ,  AYGUN KEMAL ,  RAMASWAMY CHANDRASHEKHAR ,  PALMER ERIC ,  BRAUNISCH HENNING

IPC: H01L23/48 ,  H01L23/367 ,  H01L23/498

Abstract: A high-speed input/output (I/O) trace is part of an I/O package architecture for an integrated circuit package substrate. The integrated circuit package substrate 112 includes an integrated heat spreader (IHS) footprint 118 on a die-side 130 and the I/O trace 134 to couple with an IC device 110 to be disposed inside the IHS footprint 118. The I/O trace 134 includes a pin-out terminal 136 outside the IHS footprint 118 to couple to an IC device to be disposed outside the IHS footprint. The high-speed I/O trace can sustain a data flow rate from a processor in a range from 5 gigabits per second (Gb/s) to 40 Gb/s. The pin-out terminal 136 may be a detachable connector terminal for a flexible signal-transmission cable.

公开(公告)号：DE112009002197T5

公开(公告)日：2011-08-25

申请号：DE112009002197

申请日：2009-09-23

Applicant: INTEL CORP

Inventor： GANESAN SANKA ,  AYGUN KEMAL ,  RAMASWAMY CHANDRASHEKHAR ,  PALMER ERIC ,  BRAUNISCH HENNING

IPC: H01L23/50 ,  H01L23/48 ,  H01L23/488

Abstract: Eine Hochgeschwindigkeits-E/A-Leitung ist ein Teil einer E/A-Bauelementarchitektur für ein Substrat eines Bauelements einer integrierten Schaltung. Das Substrat eines Bauelements einer integrierten Schaltung umfasst eine Aufstandsfläche eines integrierten Wärmeverteilers auf einer Chipseite und die E/A-Leitung zur Verbindung mit einer IC-Vorrichtung, die innerhalb der IHS-Aufstandsfläche anzuordnen ist. Die E/A-Leitung umfasst eine Anschlussstelle außerhalb der IHS-Aufstandsfläche zur Verbindung mit einer IC-Vorrichtung, die außerhalb der IHS-Aufstandsfläche anzuordnen ist. Die Hochgeschwindigkeits-E/A-Leitung kann eine Datenflussrate von einem Prozessor in einem Bereich von 5 Gigabit je Sekunde (Gb/s) bis 40 Gb/s unterstützen.