Microelectronic package having bumpless laminated interconnection layer

    公开(公告)号:AU1997202A

    公开(公告)日:2002-06-24

    申请号:AU1997202

    申请日:2001-11-15

    Applicant: INTEL CORP

    Abstract: A microelectronic device fabrication technology that places at least one microelectronic die within at least one opening in a microelectronic package core and secures the microelectronic die/dice within the openings(s) with an encapsulation material, that encapsulates at least one microelectronic die within an encapsulation material without a microelectronic package core, or that secures at least one microelectronic die within at least one opening in a heat spreader. A laminated interconnector of dieelectric materials and conductive traces is then attached to the microelectronic die/dice and at least one of following: the encapsulation material, the microelectronic package core, and the heat spreader, to form a microelectronic device.

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