公开(公告)号：SG10202006474TA

公开(公告)日：2021-03-30

申请号：SG10202006474T

申请日：2020-07-06

Applicant: INTEL CORP

Inventor： GANESAN SANKA ,  MCCARTHY KEVIN ,  TRIBOLET LEIGH M ,  MALLIK DEBENDRA ,  MAHAJAN RAVINDRANATH V ,  SANKMAN ROBERT L

Abstract: Embodiments include semiconductor packages and methods to form the semiconductor packages. A semiconductor package includes a bridge with a hybrid layer on a high-density packaging (HDP) substrate, a plurality of dies over the bridge and the HDP substrate, and a plurality of through mold vias (TMVs) on the HDP substrate. The bridge is coupled between the dies and the HDP substrate. The bridge is directly coupled to two dies of the dies with the hybrid layer, where a top surface of the hybrid layer of the bridge is directly on bottom surfaces of the dies, and where a bottom surface of the bridge is directly on a top surface of the HDP substrate. The TMVs couple the HDP substrate to the dies, and have a thickness that is substantially equal to a thickness of the bridge. The hybrid layer includes conductive pads, surface finish, and/or dielectric.