公开(公告)号：US11664290B2

公开(公告)日：2023-05-30

申请号：US17459993

申请日：2021-08-27

Applicant: INTEL CORPORATION

Inventor： Rahul Jain ,  Kyu Oh Lee ,  Siddharth K. Alur ,  Wei-Lun K. Jen ,  Vipul V. Mehta ,  Ashish Dhall ,  Sri Chaitra J. Chavali ,  Rahul N. Manepalli ,  Amruthavalli P. Alur ,  Sai Vadlamani

IPC: H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L23/498 ,  H01L23/532 ,  H01L23/538 ,  H01L23/00 ,  H01L25/065

CPC classification number: H01L23/3185 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/5381 ,  H01L23/5383 ,  H01L23/5386 ,  H01L23/53295 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/16227 ,  H01L2224/81 ,  H01L2224/83051 ,  H01L2924/18161

Abstract: An apparatus is provided which comprises: a substrate, a die site on the substrate to couple with a die, a die side component site on the substrate to couple with a die side component, and a raised barrier on the substrate between the die and die side component sites to contain underfill material disposed at the die site, wherein the raised barrier comprises electroplated metal. Other embodiments are also disclosed and claimed.

公开(公告)号：US20170178988A1

公开(公告)日：2017-06-22

申请号：US14977670

申请日：2015-12-22

Applicant: Intel Corporation

Inventor： Robert F Cheney ,  Ashish Dhall ,  Suriyakala Ramalingam

IPC: H01L23/24 ,  H01L23/31 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L23/49838 ,  H01L21/4853 ,  H01L21/563 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/29355 ,  H01L2224/29393 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2224/83951 ,  H01L2224/92125 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A method for forming an electrical device includes attaching a semiconductor die on a carrier. The method further includes dispensing a fillet material at at least one edge of the semiconductor die arranged on the carrier. The method further includes dispensing an underfill material into a gap between the semiconductor die and the carrier after dispensing the fillet material.

公开(公告)号：US11935805B2

公开(公告)日：2024-03-19

申请号：US18133868

申请日：2023-04-12

Applicant: Intel Corporation

Inventor： Rahul Jain ,  Kyu Oh Lee ,  Siddharth K. Alur ,  Wei-Lun K. Jen ,  Vipul V. Mehta ,  Ashish Dhall ,  Sri Chaitra J. Chavali ,  Rahul N. Manepalli ,  Amruthavalli P. Alur ,  Sai Vadlamani

IPC: H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/498 ,  H01L23/532 ,  H01L23/538 ,  H01L25/065

CPC classification number: H01L23/3185 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/53295 ,  H01L23/5381 ,  H01L23/5383 ,  H01L23/5386 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/16227 ,  H01L2224/81 ,  H01L2224/83051 ,  H01L2924/18161

Abstract: An apparatus is provided which comprises: a substrate, a die site on the substrate to couple with a die, a die side component site on the substrate to couple with a die side component, and a raised barrier on the substrate between the die and die side component sites to contain underfill material disposed at the die site, wherein the raised barrier comprises electroplated metal. Other embodiments are also disclosed and claimed.

公开(公告)号：US11158558B2

公开(公告)日：2021-10-26

申请号：US16464547

申请日：2016-12-29

Applicant: INTEL CORPORATION

Inventor： Rahul Jain ,  Kyu Oh Lee ,  Siddharth K. Alur ,  Wei-Lun K. Jen ,  Vipul V. Mehta ,  Ashish Dhall ,  Sri Chaitra J. Chavali ,  Rahul N. Manepalli ,  Amruthavalli P. Alur ,  Sai Vadlamani

IPC: H01L23/48 ,  H01L21/00 ,  H01L21/44 ,  H05K7/00 ,  H01R9/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L23/538 ,  H01L23/00 ,  H01L25/065 ,  H01L23/532 ,  H01L23/498

Abstract: An apparatus is provided which comprises: a substrate, a die site on the substrate to couple with a die, a die side component site on the substrate to couple with a die side component, and a raised barrier on the substrate between the die and die side component sites to contain underfill material disposed at the die site, wherein the raised barrier comprises electroplated metal. Other embodiments are also disclosed and claimed.

公开(公告)号：US10269695B2

公开(公告)日：2019-04-23

申请号：US15607352

申请日：2017-05-26

Applicant: Intel Corporation

Inventor： Robert F. Cheney ,  Ashish Dhall ,  Suriyakala Ramalingam

IPC: H01L23/04 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56

Abstract: A method for forming an electrical device includes attaching a semiconductor die on a carrier. The method further includes dispensing a fillet material at at least one edge of the semiconductor die arranged on the carrier. The method further includes dispensing an underfill material into a gap between the semiconductor die and the carrier after dispensing the fillet material.

公开(公告)号：US20210391232A1

公开(公告)日：2021-12-16

申请号：US17459993

申请日：2021-08-27

Applicant: INTEL CORPORATION

Inventor： Rahul Jain ,  Kyu Oh Lee ,  Siddharth K. Alur ,  Wei-Lun K. Jen ,  Vipul V. Mehta ,  Ashish Dhall ,  Sri Chaitra J. Chavali ,  Rahul N. Manepalli ,  Amruthavalli P. Alur ,  Sai Vadlamani

IPC: H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L23/538 ,  H01L23/00 ,  H01L25/065 ,  H01L23/532 ,  H01L23/498

Abstract: An apparatus is provided which comprises: a substrate, a die site on the substrate to couple with a die, a die side component site on the substrate to couple with a die side component, and a raised barrier on the substrate between the die and die side component sites to contain underfill material disposed at the die site, wherein the raised barrier comprises electroplated metal. Other embodiments are also disclosed and claimed.

公开(公告)号：US20210111088A1

公开(公告)日：2021-04-15

申请号：US16464547

申请日：2016-12-29

Applicant: INTEL CORPORATION

Inventor： Rahul Jain ,  Kyu Oh Lee ,  Siddharth K. Alur ,  Wei-Lun K. Jen ,  Vipul V. Mehta ,  Ashish Dhall ,  Sri Chaitra J. Chavali ,  Rahul N. Manepalli ,  Amruthavalli P. Alur ,  Sai Vadlamani

IPC: H01L23/31 ,  H01L25/065 ,  H01L23/00 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56

Abstract: An apparatus is provided which comprises: a substrate, a die site on the substrate to couple with a die, a die side component site on the substrate to couple with a die side component, and a raised barrier on the substrate between the die and die side component sites to contain underfill material disposed at the die site, wherein the raised barrier comprises electroplated metal. Other embodiments are also disclosed and claimed.

公开(公告)号：US20170263517A1

公开(公告)日：2017-09-14

申请号：US15607352

申请日：2017-05-26

Applicant: Intel Corporation

Inventor： Robert F. Cheney ,  Ashish Dhall ,  Suriyakala Ramalingam

IPC: H01L23/24 ,  H01L21/56 ,  H01L23/498 ,  H01L21/48 ,  H01L23/31

CPC classification number: H01L23/49838 ,  H01L21/4853 ,  H01L21/563 ,  H01L23/295 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/26175 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/29355 ,  H01L2224/29393 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2224/83007 ,  H01L2224/83051 ,  H01L2224/83104 ,  H01L2224/83951 ,  H01L2224/92125 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A method for forming an electrical device includes attaching a semiconductor die on a carrier. The method further includes dispensing a fillet material at at least one edge of the semiconductor die arranged on the carrier. The method further includes dispensing an underfill material into a gap between the semiconductor die and the carrier after dispensing the fillet material.

公开(公告)号：US09691675B1

公开(公告)日：2017-06-27

申请号：US14977670

申请日：2015-12-22

Applicant: Intel Corporation

Inventor： Robert F Cheney ,  Ashish Dhall ,  Suriyakala Ramalingam

IPC: H01L23/04 ,  H01L23/24 ,  H01L21/48 ,  H01L21/56 ,  H01L23/498 ,  H01L23/31

CPC classification number: H01L23/49838 ,  H01L21/4853 ,  H01L21/563 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/29355 ,  H01L2224/29393 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2224/83951 ,  H01L2224/92125 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A method for forming an electrical device includes attaching a semiconductor die on a carrier. The method further includes dispensing a fillet material at at least one edge of the semiconductor die arranged on the carrier. The method further includes dispensing an underfill material into a gap between the semiconductor die and the carrier after dispensing the fillet material.