公开(公告)号：US20210241431A1

公开(公告)日：2021-08-05

申请号：US17171925

申请日：2021-02-09

Applicant: Intel Corporation

Inventor： Carson BROWNLEE ,  Ingo WALD ,  Attila AFRA ,  Johannes GUENTHER ,  Jefferson AMSTUTZ ,  Carsten BENTHIN

IPC: G06T5/00 ,  G06T1/20 ,  G06T5/20 ,  G06T9/00 ,  G06T15/06

Abstract: Apparatus and method for denoising of images generated by a rendering engine such as a ray tracing engine. For example, one embodiment of a system or apparatus comprises: A system comprising: a plurality of nodes to perform ray tracing operations; a dispatcher node to dispatch graphics work to the plurality of nodes, each node to perform ray tracing to render a region of an image frame; at least a first node of the plurality comprising: a ray-tracing renderer to perform ray tracing to render a first region of the image frame; and a denoiser to perform denoising of the first region using a combination of data associated with the first region and data associated with a region outside of the first region, at least some of the data associated with the region outside of the first region to be retrieved from at least one other node.

公开(公告)号：US20240087208A1

公开(公告)日：2024-03-14

申请号：US18372783

申请日：2023-09-26

Applicant: INTEL CORPORATION

Inventor： Sven WOOP ,  Attila AFRA ,  Carsten BENTHIN ,  Ingo WALD ,  Johannes GUENTHER

IPC: G06T15/00 ,  G06T1/20 ,  G06T15/06

CPC classification number: G06T15/005 ,  G06T1/20 ,  G06T15/06 ,  G06T17/00

Abstract: A graphics processing apparatus comprising bounding volume hierarchy (BVH) construction circuitry to perform a spatial analysis and temporal analysis related to a plurality of input primitives and responsively generate a BVH comprising spatial, temporal, and spatial-temporal components that are hierarchically arranged, wherein the spatial components include a plurality of spatial nodes with children, the spatial nodes bounding the children using spatial bounds, and the temporal components comprise temporal nodes with children, the temporal nodes bounding their children using temporal bounds and the spatial-temporal components comprise spatial-temporal nodes with children, the spatial-temporal nodes bounding their children using spatial and temporal bounds; and ray traversal/intersection circuitry to traverse a ray or a set of rays through the BVH in accordance with the spatial and temporal components.

公开(公告)号：US20230016642A1

公开(公告)日：2023-01-19

申请号：US17868610

申请日：2022-07-19

Applicant: INTEL CORPORATION

Inventor： Sven WOOP ,  Attila AFRA ,  Carsten BENTHIN ,  Ingo WALD ,  Johannes GUENTHER

IPC: G06T15/00 ,  G06T15/06 ,  G06T1/20

Abstract: A graphics processing apparatus comprising bounding volume hierarchy (BVH) construction circuitry to perform a spatial analysis and temporal analysis related to a plurality of input primitives and responsively generate a BVH comprising spatial, temporal, and spatial-temporal components that are hierarchically arranged, wherein the spatial components include a plurality of spatial nodes with children, the spatial nodes bounding the children using spatial bounds, and the temporal components comprise temporal nodes with children, the temporal nodes bounding their children using temporal bounds and the spatial-temporal components comprise spatial-temporal nodes with children, the spatial-temporal nodes bounding their children using spatial and temporal bounds; and ray traversal/intersection circuitry to traverse a ray or a set of rays through the BVH in accordance with the spatial and temporal components.