公开(公告)号：WO2023038755A1

公开(公告)日：2023-03-16

申请号：PCT/US2022/039973

申请日：2022-08-10

Applicant: INTEL CORPORATION

Inventor： TANAKA, Hiroki ,  MARIN, Brandon C. ,  DARMAWIKARTA, Kristof ,  PIETAMBARAM, Srinivas Venkata Ramanuja ,  ECTON, Jeremy D. ,  MAHALINGAM, Hari ,  DUONG, Benjamin

IPC: G02B6/12

Abstract: An electro-optical system having one or more electro-optical devices integrally formed within a substrate and associated methods are disclosed. An electro-optical system including an electro-optic switch is shown. An electro-optical system including an electro-optic modulator is shown. An electro-optical system including an optical resonator is shown.

公开(公告)号：WO2022203788A1

公开(公告)日：2022-09-29

申请号：PCT/US2022/017022

申请日：2022-02-18

Applicant: INTEL CORPORATION

Inventor： CHEN, Haobo ,  GUO, Xiaoying ,  FENG, Hongxia ,  DARMAWIKARTA, Kristof ,  NIE, Bai ,  IBRAHIM, Tarek A. ,  DUAN, Gang ,  ECTON, Jeremy D. ,  LI, Sheng C. ,  ARANA, Leonel

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065

Abstract: Embodiments disclosed herein include a multi-die packages with an embedded bridge and a thinned surface. In an example, a multi-die interconnect structure includes a package substrate having a cavity. A bridge die is in the cavity of the package substrate, the bridge die including silicon. A dielectric material is over the package substrate, over the bridge die, and in the cavity. A plurality of conductive bond pads is on the dielectric material. The multi-die interconnect structure further includes a plurality of conductive pillars, individual ones of the plurality of conductive pillars on a corresponding one of the plurality of conductive bond pads. A solder resist material is on the dielectric material, on exposed portions of the plurality of conductive bond pads, and laterally surrounding the plurality of conductive pillars. The plurality of conductive pillars has a top surface above a top surface of the solder resist material.

公开(公告)号：WO2023049540A1

公开(公告)日：2023-03-30

申请号：PCT/US2022/073988

申请日：2022-07-21

Applicant: INTEL CORPORATION

Inventor： ECTON, Jeremy D. ,  ARANA, Leonel R. ,  MARIN, Brandon C. ,  PIETAMBARAM, Srinivas Venkata Ramanuja ,  DUAN, Gang

IPC: H01L25/065 ,  H01L23/31 ,  H01L21/48 ,  H01L23/15 ,  H01L23/00 ,  H01L23/498 ,  H01L23/29

Abstract: An electronic device comprises a mold layer that includes multiple integrated circuit (IC) dice having contact pads, a glass core patch embedded in encapsulating material that surrounds the top, bottom, and sides of the glass core patch, and a first redistribution layer arranged between the first mold layer and the glass core patch. The first redistribution layer includes electrically conductive interconnect that electrically connects one or more contact pads of the IC dice to the glass core patch.

公开(公告)号：WO2023044184A1

公开(公告)日：2023-03-23

申请号：PCT/US2022/073989

申请日：2022-07-21

Applicant: INTEL CORPORATION

Inventor： ECTON, Jeremy D. ,  GRUJICIC, Darko ,  NAD, Suddhasattwa ,  DUONG, Benjamin

IPC: H01L23/498 ,  H01L23/15 ,  H01L23/00 ,  H01L21/48

Abstract: An electronic device comprises an electronic package with a glass core. The glass core includes a first surface and a second surface opposite the first surface, at least one through-glass via (TGV) extending through the glass core from the first surface to the second surface and including an electrically conductive material, and wherein the at least one TGV includes a first portion having a first sidewall and a second portion that includes a second sidewall, wherein the first sidewall includes seed metallization and the second sidewall excludes the seed metallization.

公开(公告)号：EP4399554A1

公开(公告)日：2024-07-17

申请号：EP22867875.1

申请日：2022-08-10

Applicant: INTEL Corporation

Inventor： TANAKA, Hiroki ,  MARIN, Brandon C. ,  DARMAWIKARTA, Kristof ,  PIETAMBARAM, Srinivas Venkata Ramanuja ,  ECTON, Jeremy D. ,  MAHALINGAM, Hari ,  DUONG, Benjamin

IPC: G02B6/12

CPC classification number: G02F1/035