公开(公告)号：WO1996023320A1

公开(公告)日：1996-08-01

申请号：PCT/US1996000400

申请日：1996-01-11

Applicant: INTEL CORPORATION

Inventor： INTEL CORPORATION ,  MOSLEY, Larry ,  MADRID, Anna ,  NATARAJAN, Siva

IPC: H01L23/02

CPC classification number: H05K1/181 ,  H01L23/49816 ,  H01L23/50 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48233 ,  H01L2224/48235 ,  H01L2224/49109 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30107 ,  H05K1/0243 ,  H05K1/0262 ,  H05K1/0263 ,  H05K3/3431 ,  H05K3/3436 ,  H05K2201/09809 ,  H05K2201/10689 ,  H05K2201/10734 ,  H05K2201/10969 ,  Y02P70/611 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099

Abstract: A high performance integrated circuit package (10) placed on a printed circuit (PC) board (56) and having a first dielectric layer. On top of this first dielectric layer a metallized die pad (22) and a first metal ring (38a), surrounding this metallized die pad, are positioned. The metallized die pad and the first metal ring electrically couple to the PC board to receive respectively a first power supply signal and a second power supply signal. An integrated circuit die (12) is then affixed to the metallized die pad. This integrated circuit die (12) has a first power supply signal bond pad (28, 30) and a second power supply signal bond pad (33, 34), which respectively are coupled to the metallized die pad and the first metal ring. Consequently, the metallized die pad and the first metal ring operate as a first power supply plane and a second power supply plane coupling the first and second power supply signals coming from the PC board to the first and second power supply signal bond pads on the integrated circuit die.

Abstract translation: 放置在印刷电路板（PC）板（56）上并具有第一电介质层的高性能集成电路封装（10）。 在该第一电介质层的顶部，定位围绕该金属化管芯焊盘的金属化管芯焊盘（22）和第一金属环（38a）。 金属化管芯焊盘和第一金属环电耦合到PC板以分别接收第一电源信号和第二电源信号。 然后将集成电路管芯（12）固定到金属化管芯焊盘。 该集成电路管芯（12）具有分别耦合到金属化管芯焊盘和第一金属环的第一电源信号焊盘（28,30）和第二电源信号焊盘（33,34）。 因此，金属化管芯焊盘和第一金属环作为第一电源平面和第二电源平面工作，第二电源平面将来自PC板的第一和第二电源信号耦合到集成的第一和第二电源信号焊盘上 电路模。

公开(公告)号：WO2006039438A3

公开(公告)日：2006-04-13

申请号：PCT/US2005/035089

申请日：2005-09-29

Applicant: INTEL CORPORATION ,  PALANDUZ, Cengiz ,  MOSLEY, Larry

Inventor： PALANDUZ, Cengiz ,  MOSLEY, Larry

IPC: H01L21/02

Abstract: An apparatus, and a method for forming, a split thin film capacitor for providing multiple power and reference supply voltage levels to electrical devices such as integrated circuits, may be useful in space restricted applications, and in applications that require very close electrical connections between the power consumer and the power supply. An example of both a space restricted application and a close coupling application may be an integrated circuit (IC) such as a microprocessor. The capacitor supplying and moderating power to the microprocessor needs to be closely coupled in order to respond to instantaneous power demands that may be found in high clock rate microprocessors, and the space inside a microprocessor package is very restricted. The microprocessor may use a lower voltage power supply level for minimum sized fast transistors in the fast core logic portions of the microprocessor, and a more normal voltage power supply voltage level for the cache memory and I/O transistor portions of the microprocessor. Thus a compact capacitor with multiple power and reference supply levels may be needed to provide the required power for a high frequency IC.