公开(公告)号：US11501484B2

公开(公告)日：2022-11-15

申请号：US17032964

申请日：2020-09-25

Applicant: INTEL CORPORATION

Inventor： Michael Apodaca ,  Carsten Benthin ,  Kai Xiao ,  Carson Brownlee ,  Timothy Rowley ,  Joshua Barczak ,  Travis Schluessler

IPC: G06T15/06 ,  G06F16/901 ,  G06F7/14 ,  G06F9/38 ,  G06N3/02 ,  G06T5/00 ,  G06T1/20 ,  G06T1/60

Abstract: Apparatus and method for acceleration data structure refit. For example, one embodiment of an apparatus comprises: a ray generator to generate a plurality of rays in a first graphics scene; a hierarchical acceleration data structure generator to construct an acceleration data structure comprising a plurality of hierarchically arranged nodes including inner nodes and leaf nodes stored in a memory in a depth-first search (DFS) order; traversal hardware logic to traverse one or more of the rays through the acceleration data structure; intersection hardware logic to determine intersections between the one or more rays and one or more primitives within the hierarchical acceleration data structure; a node refit unit comprising circuitry and/or logic to read consecutively through at least the inner nodes in the memory in reverse DFS order to perform a bottom-up refit operation on the hierarchical acceleration data structure.

公开(公告)号：US10937225B2

公开(公告)日：2021-03-02

申请号：US16236271

申请日：2018-12-28

Applicant: Intel Corporation

Inventor： Timothy Rowley ,  Won-Jong Lee ,  Karol Szerszen ,  Hiroshi Akiba ,  Alexey Supikov

IPC: G06T15/06 ,  G06T15/08 ,  G06T17/30 ,  G06T17/10

Abstract: Apparatus and method including cell primitive for unstructured volume rendering. For example, one embodiment of an apparatus comprises: a ray generator to generate a plurality of rays in a first graphics scene; a hierarchical acceleration data structure generator to construct a hierarchical acceleration data structure comprising a plurality of hierarchically arranged nodes including leaf nodes and inner nodes; traversal circuitry to traverse one or more of the rays through the hierarchical acceleration data structure; unstructured volume intersection circuitry to intersect a ray with an unstructured volume primitive within a leaf node of the hierarchical acceleration data structure, the unstructured volume intersection circuitry to determine multiple intersection hits between a ray and an unstructured volume primitive.

公开(公告)号：US12229870B2

公开(公告)日：2025-02-18

申请号：US17982766

申请日：2022-11-08

Applicant: INTEL CORPORATION

Inventor： Michael Apodaca ,  Carsten Benthin ,  Kai Xiao ,  Carson Brownlee ,  Timothy Rowley ,  Joshua Barczak ,  Travis Schluessler

IPC: G06T15/06 ,  G06F7/14 ,  G06F9/38 ,  G06F16/901 ,  G06N3/02 ,  G06T1/20 ,  G06T1/60 ,  G06T5/70

Abstract: Apparatus and method for acceleration data structure refit. For example, one embodiment of an apparatus comprises: a ray generator to generate a plurality of rays in a first graphics scene; a hierarchical acceleration data structure generator to construct an acceleration data structure comprising a plurality of hierarchically arranged nodes including inner nodes and leaf nodes stored in a memory in a depth-first search (DFS) order; traversal hardware logic to traverse one or more of the rays through the acceleration data structure; intersection hardware logic to determine intersections between the one or more rays and one or more primitives within the hierarchical acceleration data structure; a node refit unit comprising circuitry and/or logic to read consecutively through at least the inner nodes in the memory in reverse DFS order to perform a bottom-up refit operation on the hierarchical acceleration data structure.