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公开(公告)号:US20190120879A1
公开(公告)日:2019-04-25
申请号:US15789199
申请日:2017-10-20
Applicant: Infineon Technologies AG
Inventor: Richard Gaggl , Andrea Baschirotto , Cesare Buffa , Fulvio Ciciotti
IPC: G01R15/00
Abstract: A readout circuit for resistive and capacitive sensors includes a first input coupled to a reference resistor in a first mode of operation and coupled to a resistive sensor in a second mode of operation; a second input coupled to a capacitive sensor in the first mode of operation and coupled to a reference capacitor in the second mode of operation; and an output for providing a capacitive sensor data stream in the first mode of operation and for providing a resistive sensor data stream in the second mode of operation.
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公开(公告)号:US12218679B2
公开(公告)日:2025-02-04
申请号:US18146641
申请日:2022-12-27
Applicant: Infineon Technologies AG
Inventor: Dan Ioan Dumitru Stoica , Constantin Crisu , Constantin Stroi , Vlad Buiculescu , Matthias Böhm , Alessandro Caspani , Cesare Buffa , Franz Michael Darrer
IPC: H03M1/10 , G10L21/0232 , H03M1/06 , H03M1/34
Abstract: A sensor circuit, having a startup phase and an operation phase, includes: a sensor configured to generate a sensor signal based on a measured property, wherein the sensor signal has a frequency spectrum defined by a first frequency and a second frequency that is greater than the first frequency; a signal processing circuit including an analog-to-digital converter (ADC) configured to convert the sensor signal into a digital sensor signal; and an offset diagnosis circuit. The offset diagnosis circuit includes: a low pass filter having a cutoff frequency less than the first frequency and configured to generate a filtered signal based on the digital sensor signal; an offset register configured to store a startup signal value of the filtered signal during the startup phase; and an offset comparator circuit configured to set a threshold range based on the startup signal value for use during the operation phase.
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公开(公告)号:US11953533B2
公开(公告)日:2024-04-09
申请号:US17347776
申请日:2021-06-15
Applicant: Infineon Technologies AG
Inventor: Dan-Ioan-Dumitru Stoica , Cesare Buffa , Constantin Crisu , Mihai-Liviu Tudose , Bernhard Winkler
CPC classification number: G01R27/2605 , G01R27/28 , G01R31/2843
Abstract: A capacitive sensor includes a first conductive structure; a second conductive structure that is counter to the first conductive structure, wherein the second conductive structure is movable relative to the first conductive structure in response to an external force acting thereon, wherein the second conductive structure is capacitively coupled to the first conductive structure to form a first capacitor having a first capacitance that changes with a change in a distance between the first conductive structure and second conductive structure; a signal generator configured to apply a first electrical signal step at an input or at an output of the first capacitor to induce a first voltage transient response at the output of first capacitor; and a diagnostic circuit configured to detect a fault in the capacitive sensor by measuring a first time constant of the first voltage transient response and detecting the fault based on the first time constant.
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公开(公告)号:US11099213B2
公开(公告)日:2021-08-24
申请号:US15789199
申请日:2017-10-20
Applicant: Infineon Technologies AG
Inventor: Richard Gaggl , Andrea Baschirotto , Cesare Buffa , Fulvio Ciciotti
Abstract: A readout circuit for resistive and capacitive sensors includes a first input coupled to a reference resistor in a first mode of operation and coupled to a resistive sensor in a second mode of operation; a second input coupled to a capacitive sensor in the first mode of operation and coupled to a reference capacitor in the second mode of operation; and an output for providing a capacitive sensor data stream in the first mode of operation and for providing a resistive sensor data stream in the second mode of operation.
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公开(公告)号:US10541683B2
公开(公告)日:2020-01-21
申请号:US15063067
申请日:2016-03-07
Applicant: Infineon Technologies AG
Inventor: Cesare Buffa , Elmar Bach
IPC: H03K17/687 , G06F17/50 , H04R19/04
Abstract: A high-ohmic circuit includes a plurality of high-ohmic branches coupled in parallel between a first node and a second node. Each of the plurality of high-ohmic branches includes a first plurality of series connected resistive elements forming a first series path from the first node to the second node, each of the first plurality of series connected resistive elements comprising a first diode-connected transistor. Each of the plurality of high-ohmic branches further includes a second plurality of series connected resistive elements forming a second series path from the first node to the second node, each of the second plurality of series connected resistive elements comprising a second diode-connected transistor. The high-ohmic circuit further includes a plurality of switches, each of the switches being coupled between a corresponding one of the plurality of high-ohmic branches and the second node.
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公开(公告)号:US10270460B1
公开(公告)日:2019-04-23
申请号:US16011272
申请日:2018-06-18
Applicant: Infineon Technologies AG
Inventor: Cesare Buffa , Fernando Cardes Garcia , Luis Hernandez-Corporales , Carlos Andres Perez Cruz , Andres Quintero Alonso , Andreas Wiesbauer
Abstract: An analog-to-digital converter includes a ring oscillator having an input for receiving an analog signal, a coarse Gray code counter having a first input coupled to a first output of the ring oscillator and a second input for receiving a clock signal, a fine counter having first inputs coupled to secondary outputs of the ring oscillator and a second input for receiving the clock signal, a first difference generator having an input coupled to the output of the coarse counter, a second difference generator having an input coupled to the output of the fine counter, and an adder having a first input coupled to the output of the first difference generator, a second input coupled to the output of the second difference generator, and an output for providing a digital signal corresponding to the analog signal.
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公开(公告)号:US11927645B2
公开(公告)日:2024-03-12
申请号:US17463753
申请日:2021-09-01
Applicant: Infineon Technologies AG
Inventor: Dan-Ioan-Dumitru Stoica , Cesare Buffa , Alessandro Caspani , Constantin Crisu , Victor Popescu-Stroe , Bernhard Winkler
CPC classification number: G01R31/64 , G01R27/2605 , G01R35/00 , G01H11/06 , G01L9/12
Abstract: A capacitive sensor includes a first electrode structure; a second electrode structure that is counter to the first electrode structure, wherein the second electrode structure is movable relative to the first electrode structure and is capacitively coupled to the first electrode structure to form a capacitor having a capacitance that changes with a change in a distance between the first electrode structure and second electrode structure; a signal generator configured to apply an electrical signal at an input or at an output of the capacitor to induce a voltage transient response at the output of capacitor; and a diagnostic circuit configured to detect a fault in the capacitive sensor by measuring a time constant of the first voltage transient response and detecting the fault based on the time constant and based on whether the first electrical signal is the pull-in signal or the non-pull-in signal.
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公开(公告)号:US20210270872A1
公开(公告)日:2021-09-02
申请号:US17325742
申请日:2021-05-20
Applicant: Infineon Technologies AG
Inventor: Richard Gaggl , Andrea Baschirotto , Cesare Buffa , Fulvio Ciciotti
Abstract: A readout circuit for resistive and capacitive sensors includes a first input coupled to a reference resistor in a first mode of operation and coupled to a resistive sensor in a second mode of operation; a second input coupled to a capacitive sensor in the first mode of operation and coupled to a reference capacitor in the second mode of operation; and an output for providing a capacitive sensor data stream in the first mode of operation and for providing a resistive sensor data stream in the second mode of operation.
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公开(公告)号:US10228414B2
公开(公告)日:2019-03-12
申请号:US15078453
申请日:2016-03-23
Applicant: Infineon Technologies AG
Inventor: Cesare Buffa , Richard Gaggl
Abstract: Sensor devices and methods are provided where a test signal is applied to a capacitive sensor. Furthermore, a bias voltage is applied to the capacitive sensor via a high impedance component. A path for applying the test signal excludes the high impedance component. Using this testing signal, in some implementations a capacity imbalance of the capacitive sensor may be detected.
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公开(公告)号:US10886930B1
公开(公告)日:2021-01-05
申请号:US16526346
申请日:2019-07-30
Applicant: Infineon Technologies AG
Inventor: Cesare Buffa , Luis Hernandez-Corporales , Carlos Andres Perez Cruz , Andres Quintero Alonso , Andreas Wiesbauer
Abstract: An analog-to-digital converter includes a ring oscillator having an input for receiving an analog signal, a coarse counter including a maximum length sequence generator having an input coupled to the output of the ring oscillator, a fine counter including a Johnson counter having an input coupled to the output of the ring oscillator, and a difference generator having a first input coupled to the output of the coarse counter, a second input coupled to the output of the fine counter, and an output for providing a digital signal corresponding to the analog signal.
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