公开(公告)号：US20200004677A1

公开(公告)日：2020-01-02

申请号：US16020444

申请日：2018-06-27

Applicant: Intel Corporation

Inventor： Amin Firoozshahian ,  Omid Azizi ,  Chandan Egbert ,  David Hansen ,  Andreas Kleen ,  Mahesh Maddury ,  Mahesh Madhav ,  Alexandre Solomatnikov ,  John Peter Stevenson

IPC: G06F12/02 ,  G06F12/1009 ,  G06F3/06

Abstract: Processing circuitry for computer memory management includes memory reduction circuitry to implement a memory reduction technique; and reference count information collection circuitry to: access a memory region, the memory region subject to the memory reduction technique; obtain an indication of memory reduction of the memory region; calculate metrics based on the indication of memory reduction of cache lines associated with the memory region; and provide the metrics to a system software component for use in memory management mechanisms.