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公开(公告)号:US11079955B2
公开(公告)日:2021-08-03
申请号:US16221832
申请日:2018-12-17
Applicant: Intel Corporation
Inventor: Francesc Guim Bernat , Karthik Kumar , Mustafa Hajeer , Thomas Willhalm , Amin Firoozshahian , Chandan Egbert
IPC: G06F3/06
Abstract: Examples relate to an approximative memory deduplication method, a controller apparatus or controller device for a memory or storage controller, a memory or storage controller, a computer system and to a computer program. The approximative memory deduplication method comprises determining a hash value of a data block. The hash value is based on a user-defined approximative hashing function. The approximative memory deduplication method comprises storing a quantized version of the data block based on the hash value using a memory or storage device of the computer system.
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公开(公告)号:US10732880B2
公开(公告)日:2020-08-04
申请号:US15868787
申请日:2018-01-11
Applicant: Intel Corporation
Inventor: Omid Azizi , Amin Firoozshahian , John Stevenson , Mahesh Maddury , Chandan Egbert , Henk Neefs
IPC: G06F3/06 , G06F12/02 , G06F12/0811 , G06F12/084 , G06F12/0868
Abstract: Various systems and methods for computer memory management are described herein. A system for computer memory management includes a first memory device including a mapping table; a second memory device including a staging area; a third memory device including a dedup data region; and a controller operable to: receive a memory access request, the memory access request including an address and data; write the data to the staging area; and update the mapping table with the address.
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公开(公告)号:US20200004677A1
公开(公告)日:2020-01-02
申请号:US16020444
申请日:2018-06-27
Applicant: Intel Corporation
Inventor: Amin Firoozshahian , Omid Azizi , Chandan Egbert , David Hansen , Andreas Kleen , Mahesh Maddury , Mahesh Madhav , Alexandre Solomatnikov , John Peter Stevenson
IPC: G06F12/02 , G06F12/1009 , G06F3/06
Abstract: Processing circuitry for computer memory management includes memory reduction circuitry to implement a memory reduction technique; and reference count information collection circuitry to: access a memory region, the memory region subject to the memory reduction technique; obtain an indication of memory reduction of the memory region; calculate metrics based on the indication of memory reduction of cache lines associated with the memory region; and provide the metrics to a system software component for use in memory management mechanisms.
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公开(公告)号:US11681611B2
公开(公告)日:2023-06-20
申请号:US17119679
申请日:2020-12-11
Applicant: Intel Corporation
Inventor: Omid Azizi , Amin Firoozshahian , Andreas Kleen , Mahesh Madhav , Mahesh Maddury , Chandan Egbert , Eric Gouldey
CPC classification number: G06F12/0246 , G06F3/0604 , G06F3/065 , G06F3/0608 , G06F3/0641 , G06F9/5016 , G06F12/0292
Abstract: Various systems and methods for computer memory overcommitment management are described herein. A system for computer memory management includes a memory device to store data and a mapping table; and a memory overcommitment circuitry to: receive a signal to move data in a first block from a memory reduction area in the memory device to a non-memory reduction area in the memory device, the memory reduction area to store data using a memory reduction technique, and the non-memory reduction area to store data without any memory reduction techniques; allocate a second block in the non-memory reduction area; copy the data in the first block to the second block; and update the mapping table to revise a pointer to point to the second block, the mapping table used to store pointers to memory device in the memory reduction area and the non-memory reduction area.
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公开(公告)号:US10579551B2
公开(公告)日:2020-03-03
申请号:US15855798
申请日:2017-12-27
Applicant: Intel Corporation
Inventor: Ishwar Agarwal , Omid Azizi , Chandan Egbert , Amin Firoozshahian , David Christopher Hansen , Andreas Kleen , Mahesh Maddury , Mahesh Madhav , Ashok Raj , Alexandre Solomatnikov , Stephen Van Doren
Abstract: Various systems and methods for computer memory management are described herein. A system includes a memory controller to: monitor utilization of a memory device, the memory device used with a memory compression technique; determine that the utilization of the memory device violates a threshold; and initiate a system interrupt to provoke a response, responsive to the utilization of the memory device violating the threshold.
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公开(公告)号:US20210240609A1
公开(公告)日:2021-08-05
申请号:US17119679
申请日:2020-12-11
Applicant: Intel Corporation
Inventor: Omid Azizi , Amin Firoozshahian , Andreas Kleen , Mahesh Madhav , Mahesh Maddury , Chandan Egbert , Eric Gouldey
Abstract: Various systems and methods for computer memory overcommitment management are described herein. A system for computer memory management includes a memory device to store data and a mapping table; and a memory overcommitment circuitry to: receive a signal to move data in a first block from a memory reduction area in the memory device to a non-memory reduction area in the memory device, the memory reduction area to store data using a memory reduction technique, and the non-memory reduction area to store data without any memory reduction techniques; allocate a second block in the non-memory reduction area; copy the data in the first block to the second block; and update the mapping table to revise a pointer to point to the second block, the mapping table used to store pointers to memory device in the memory reduction area and the non-memory reduction area.
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公开(公告)号:US20190196988A1
公开(公告)日:2019-06-27
申请号:US15855798
申请日:2017-12-27
Applicant: Intel Corporation
Inventor: Ishwar Agarwal , Omid Azizi , Chandan Egbert , Amin Firoozshahian , David Christopher Hansen , Andreas Kleen , Mahesh Maddury , Mahesh Madhav , Ashok Raj , Alexandre Solomatnikov , Stephen Van Doren
CPC classification number: G06F13/1668 , G06F3/0604 , G06F3/0653 , G06F3/0673 , G06F2213/24
Abstract: Various systems and methods for computer memory management are described herein. A system includes a memory controller to: monitor utilization of a memory device, the memory device used with a memory compression technique; determine that the utilization of the memory device violates a threshold; and initiate a system interrupt to provoke a response, responsive to the utilization of the memory device violating the threshold.
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