公开(公告)号：US20250147762A1

公开(公告)日：2025-05-08

申请号：US18504407

申请日：2023-11-08

Applicant: Intel Corporation

Inventor： Vasanth Ranganathan ,  Gang Chen ,  Supratim Pal ,  Jorge Eduardo Parra Osorio ,  Arthur Hunter ,  Boris Kuznetsov ,  Deepak N K ,  Siva Kumar Seemakurthi ,  James Valerio ,  Shubham Dinesh Chavan ,  Abhishek Kumar Singh ,  Samir Pandya ,  Sandeep Tippannanavar Niranjan ,  Alan Curtis ,  Jain Philip ,  Maltesh Kulkarni ,  Fangwen Fu ,  John Wiegert ,  Brent Schwartz

IPC: G06F9/30 ,  G06T15/00

Abstract: Described herein is a graphics processor having processing resources with configurable thread and register configurations. Program code can configure a number of registers and accumulators that will be used by hardware threads during execution of the program code by the graphics processor. Processing resources within the graphics processor can be configured to assign different numbers of registers and accumulators to hardware threads based on the configuration requested by program code to be executed by the processing resource.