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公开(公告)号：US10403609B2
公开(公告)日：2019-09-03
申请号：US15776475
申请日：2015-12-21
Applicant: Intel IP Corporation
Inventor： Christian Geissler , Sven Albers , Georg Seidemann , Andreas Wolter , Klaus Reingruber , Thomas Wagner , Marc Dittes
IPC: H01L23/02 , H01L25/16 , H01L23/48 , H01L25/065 , H01L25/07 , H01L23/00 , H01L23/498 , H01L23/538 , H01L21/56
Abstract: A system-in-package device includes at least three electrical device components arranged in a common package. A first electrical device component includes a first vertical dimension, a second electrical device component includes a second vertical dimension and a third electrical device component comprises a third vertical dimension. The first electrical device component and the second electrical device component are arranged side by side in the common package. Further, the third electrical device component is arranged on top of the first electrical device component in the common package. At least a part of the third electrical device component is arranged vertically between a front side level of the second electrical device component and a back side level of the second electrical device component.
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公开(公告)号：US20170170111A1
公开(公告)日：2017-06-15
申请号：US14970355
申请日：2015-12-15
Applicant: Intel IP Corporation
Inventor： Klaus Jürgen REINGRUBER , Sven Albers , Christian Georg Geissler , Georg Seidemann , Bernd Waidhas , Thomas Wagner , Marc Dittes
IPC: H01L23/528 , H01L23/00 , H05K1/11 , C25D5/54 , C25D7/12 , C25D5/02 , C25D5/10 , C25D5/48 , H01L23/522 , H05K1/02
CPC classification number: H01L23/528 , C25D5/022 , C25D5/10 , C25D5/48 , C25D5/54 , C25D7/123 , H01L23/49816 , H01L23/49822 , H01L23/49838 , H01L23/5226 , H01L24/09 , H01L24/19 , H01L24/20 , H01L2224/04105 , H01L2224/12105 , H01L2924/10253 , H01L2924/14 , H05K1/0296 , H05K1/111 , H05K1/115
Abstract: Semiconductor packages having variable redistribution layer thicknesses are described. In an example, a semiconductor package includes a redistribution layer on a dielectric layer, and the redistribution layer includes first conductive traces having a first thickness and second conductive traces having a second thickness. The first thickness may be different than the second thickness, e.g., the first thickness may be less than the second thickness.
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公开(公告)号：US10816742B2
公开(公告)日：2020-10-27
申请号：US16182450
申请日：2018-11-06
Applicant: Intel IP Corporation
Inventor： Georg Seidemann , Christian Geissler , Sven Albers , Thomas Wagner , Marc Dittes , Klaus Reingruber , Andreas Wolter , Richard Patten
Abstract: Disclosed is a package comprising a substrate having a patterned surface with an optical contact area, an optical redistribution layer (oRDL) feature, and a build-up material extending over the patterned surface of the substrate and around portions of the oRDL features. In some embodiments, the package comprises a liner sheathing the oRDL features. In some embodiments, the oRDL feature extends through openings in an outer surface of the build-up material and forms posts extending outward from the outer surface. In some embodiments, the package comprises an electrical redistribution layer (eRDL) feature, at least some portion of which overlap at least some portion of the oRDL feature. In some embodiments, the package comprises an optical fiber coupled to the oRDL features.
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公开(公告)号：US10115668B2
公开(公告)日：2018-10-30
申请号：US14970355
申请日：2015-12-15
Applicant: Intel IP Corporation
Inventor： Klaus Jürgen Reingruber , Sven Albers , Christian Georg Geissler , Georg Seidemann , Bernd Waidhas , Thomas Wagner , Marc Dittes
IPC: H01L23/522 , H01L23/528 , C25D5/02 , C25D5/10 , C25D5/48 , C25D5/54 , C25D7/12 , H01L23/00 , H05K1/02 , H05K1/11 , H01L23/498
Abstract: Semiconductor packages having variable redistribution layer thicknesses are described. In an example, a semiconductor package includes a redistribution layer on a dielectric layer, and the redistribution layer includes first conductive traces having a first thickness and second conductive traces having a second thickness. The first thickness may be different than the second thickness, e.g., the first thickness may be less than the second thickness.
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公开(公告)号：US10522485B2
公开(公告)日：2019-12-31
申请号：US15776474
申请日：2015-12-21
Applicant: Intel IP Corporation
Inventor： Christian Geissler , Sven Albers , Georg Seidemann , Andreas Wolter , Klaus Reingruber , Thomas Wagner , Marc Dittes
IPC: H01L23/52 , H01L23/00 , H01L21/768 , H01L23/525 , H01L23/532
Abstract: An electrical device includes a redistribution layer structure, an inter-diffusing material contact structure and a vertical electrically conductive structure located between the redistribution layer structure and the inter-diffusing material contact structure. The vertical electrically conductive structure includes a diffusion barrier structure located adjacently to the inter-diffusing material contact structure. Further, the diffusion barrier structure and the redistribution layer structure comprise different lateral dimensions.
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Patent Agency Ranking
公开(公告)号：US20190072732A1
公开(公告)日：2019-03-07
申请号：US16182450
申请日：2018-11-06
Applicant: Intel IP Corporation
Inventor： Georg Seidemann , Christian Geissler , Sven Albers , Thomas Wagner , Marc Dittes , Klaus Reingruber , Andreas Wolter , Richard Patten
CPC classification number: G02B6/428 , G02B6/12002 , G02B6/122 , G02B6/1221 , G02B6/132 , G02B6/30 , G02B6/4232 , G02B6/4238 , G02B6/43 , G02B2006/12197
Abstract: Disclosed is a package comprising a substrate having a patterned surface with an optical contact area, an optical redistribution layer (oRDL) feature, and a build-up material extending over the patterned surface of the substrate and around portions of the oRDL features. In some embodiments, the package comprises a liner sheathing the oRDL features. In some embodiments, the oRDL feature extends through openings in an outer surface of the build-up material and forms posts extending outward from the outer surface. In some embodiments, the package comprises an electrical redistribution layer (eRDL) feature, at least some portion of which overlap at least some portion of the oRDL feature. In some embodiments, the package comprises an optical fiber coupled to the oRDL features.
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公开(公告)号：US10209466B2
公开(公告)日：2019-02-19
申请号：US15089524
申请日：2016-04-02
Applicant: Intel IP Corporation
Inventor： Georg Seidemann , Christian Geissler , Sven Albers , Thomas Wagner , Marc Dittes , Klaus Reingruber , Andreas Wolter , Richard Patten
Abstract: Disclosed is a package comprising a substrate having a patterned surface with an optical contact area, an optical redistribution layer (oRDL) feature, and a build-up material extending over the patterned surface of the substrate and around portions of the oRDL features. In some embodiments, the package comprises a liner sheathing the oRDL features. In some embodiments, the oRDL feature extends through openings in an outer surface of the build-up material and forms posts extending outward from the outer surface. In some embodiments, the package comprises an electrical redistribution layer (eRDL) feature, at least some portion of which overlap at least some portion of the oRDL feature. In some embodiments, the package comprises an optical fiber coupled to the oRDL features.
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公开(公告)号：US20170285280A1
公开(公告)日：2017-10-05
申请号：US15089524
申请日：2016-04-02
Applicant: Intel IP Corporation
Inventor： Georg Seidemann , Christian Geissler , Sven Albers , Thomas Wagner , Marc Dittes , Klaus Reingruber , Andreas Wolter , Richard Patten
CPC classification number: G02B6/428 , G02B6/12002 , G02B6/122 , G02B6/1221 , G02B6/132 , G02B6/30 , G02B6/4232 , G02B6/4238 , G02B6/43 , G02B2006/12197
Abstract: Disclosed is a package comprising a substrate having a patterned surface with an optical contact area, an optical redistribution layer (oRDL) feature, and a build-up material extending over the patterned surface of the substrate and around portions of the oRDL features. In some embodiments, the package comprises a liner sheathing the oRDL features. In some embodiments, the oRDL feature extends through openings in an outer surface of the build-up material and forms posts extending outward from the outer surface. In some embodiments, the package comprises an electrical redistribution layer (eRDL) feature, at least some portion of which overlap at least some portion of the oRDL feature. In some embodiments, the package comprises an optical fiber coupled to the oRDL features.
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公开(公告)号：US10553538B2
公开(公告)日：2020-02-04
申请号：US16152221
申请日：2018-10-04
Applicant: Intel IP Corporation
Inventor： Klaus Jürgen Reingruber , Sven Albers , Christian Georg Geissler , Georg Seidemann , Bernd Waidhas , Thomas Wagner , Marc Dittes
IPC: H01L23/538 , H01L23/528 , H01L23/498 , H01L23/00 , C25D5/02 , C25D5/10 , C25D5/48 , C25D5/54 , C25D7/12 , H01L23/522 , H05K1/02 , H05K1/11
Abstract: Semiconductor packages having variable redistribution layer thicknesses are described. In an example, a semiconductor package includes a redistribution layer on a dielectric layer, and the redistribution layer includes first conductive traces having a first thickness and second conductive traces having a second thickness. The first thickness may be different than the second thickness, e.g., the first thickness may be less than the second thickness.
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公开(公告)号：US20190121041A1
公开(公告)日：2019-04-25
申请号：US16090024
申请日：2016-03-28
Applicant: Intel IP Corporation
Inventor： Sven Albers , Marc Dittes , Andreas Wolter , Klaus Reingruber , Georg Seidemann , Christian Geissler , Thomas Wagner , Richard Patten
Abstract: Embodiments of the disclosure are directed to a chip package that includes a base that includes a redistribution layer; an optical transducer circuit element on the base electrically connected to the redistribution layer; an optical element adjacent to the optical transducer circuit element and at an edge of the base; and an encasement encasing the optical transducer circuit element and a portion of the optical element, wherein one side of the optical element is exposed at an edge of the encasement and at the edge of the printed circuit board.
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